# cycle_counter_example.c File Reference

## Detailed Description

COUNT & COMPARE usage example.

Example of COUNT & COMPARE registers usage, using the USART software driver (for printing ASCII msgs), the GPIO software driver (to map the USART on I/O pins), the INTC software driver (for interrupt management).

- Compiler: IAR EWAVR32 and GNU GCC for AVR32
- Supported devices: All AVR32 devices.
- AppNote:

Author:
  Atmel Corporation: http://www.atmel.com
  Support and FAQ: http://support.atmel.no/

Definition in file cycle_counter_example.c.

`#include "intc.h"`
`#include "compiler.h"`
`#include "print_funcs.h"`
`#include "board.h"`
`#include "cycle_counter.h"`
`#include "pm_at32ap7000.h"`

Go to the source code of this file.

## Defines
#define | _ASSERT_ENABLE_
#define | NB_CLOCK_CYCLE_DELAY_LONG 20000000
#define | NB_CLOCK_CYCLE_DELAY_SHORT 1000000
## Functions
static void | compare_irq_handler (void)
int | main (void)
## Variables
static volatile unsigned int | u32NbCompareIrqTrigger = 0
static volatile unsigned char | u8DisplayMsg = 0

## Define Documentation

#define _ASSERT_ENABLE_

Definition at line 108 of file cycle_counter_example.c.

#define NB_CLOCK_CYCLE_DELAY_LONG 20000000

Definition at line 117 of file cycle_counter_example.c.

Referenced by compare_irq_handler().

#define NB_CLOCK_CYCLE_DELAY_SHORT 1000000

Definition at line 116 of file cycle_counter_example.c.

Referenced by main().

## Function Documentation

static void compare_irq_handler | ( | void |  | ) | `[static]`

Definition at line 138 of file cycle_counter_example.c.

References Get_sys_compare, NB_CLOCK_CYCLE_DELAY_LONG, Set_sys_compare, u32NbCompareIrqTrigger, and u8DisplayMsg.

Referenced by main().

    00139 {
    00140   // Count the number of times this IRQ handler is called.
    00141   u32NbCompareIrqTrigger++;
    00142   u8DisplayMsg = 1; // Inform the main program that it may display a msg saying
    00143                     // that the COUNT&COMPARE interrupt occurred.
    00144   // Clear the pending interrupt(writing a value to the COMPARE register clears
    00145   // any pending compare interrupt requests). Schedule the COUNT&COMPARE match
    00146   // interrupt to happen every NB_CLOCK_CYCLE_DELAY_LONG cycles.
    00147 #if __AVR32_AP7000__ || __AT32AP7000__
    00148   U32 next_compare;
    00149
    00150   // AP7000 don't reset COUNT on compare match. We need to offset next COMPARE.
    00151   next_compare = Get_sys_compare();
    00152   next_compare += NB_CLOCK_CYCLE_DELAY_LONG;
    00153   if (next_compare == 0) // Avoid disabling compare
    00154     next_compare++;
    00155   Set_sys_compare(next_compare);
    00156 #else
    00157   Set_sys_compare(NB_CLOCK_CYCLE_DELAY_LONG);
    00158 #endif
    00159 }

int main | ( | void |  | ) |

Definition at line 162 of file cycle_counter_example.c.

References compare_irq_handler(), Get_sys_compare, Get_sys_count, NB_CLOCK_CYCLE_DELAY_SHORT, Set_sys_compare, u32NbCompareIrqTrigger, and u8DisplayMsg.

    00163 {
    00164    U32 u32CompareVal;
    00165    U32 u32CompareValVerif;
    00166    U32 u32CountVal;
    00167    U32 u32CountNextVal;
    00168    U8  u8LedMap = 0x01;
    00169
    00170    // Reset PM. Makes sure we get the expected clocking after a soft reset (e.g.: JTAG reset)
    00171    pm_reset();
    00172
    00173    // Switch the main clock to OSC0
    00174    //  pm_switch_to_osc0(pm, FOSC0, OSC0_STARTUP);
    00175    // Init DEBUG module
    00176    init_dbg_rs232(FOSC0);
    00177
    00178    print_dbg("---------------------------------------------\n");
    00179
    00180    // Read COMPARE register.
    00181    // NOTE: it should be equal to 0 (default value upon reset) => The compare
    00182    // and exception generation feature is thus currently disabled.
    00183    u32CompareVal = Get_sys_compare();
    00184    Assert(!u32CompareVal);
    00185
    00186    // Read COUNT register.
    00187    // NOTE: the COUNT register increments since reset => it should be != 0.
    00188    u32CountVal = Get_sys_count();
    00189    Assert(u32CountVal);
    00190
    00191 #if __GNUC__
    00192    // Disable all interrupts.
    00193    Disable_global_interrupt();
    00194
    00195    INTC_init_interrupts();
    00196
    00197    // Register the compare interrupt handler to the interrupt controller.
    00198    // compare_irq_handler is the interrupt handler to register.
    00199    // AVR32_CORE_COMPARE_IRQ is the IRQ of the interrupt handler to register.
    00200    // AVR32_INTC_INT0 is the interrupt priority level to assign to the group of this IRQ.
    00201    // void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_lev);
    00202    INTC_register_interrupt(&compare_irq_handler, AVR32_CORE_COMPARE_IRQ, AVR32_INTC_INT0);
    00203 #endif
    00204    // Enable all interrupts.
    00205    Enable_global_interrupt();
    00206
    00207    // Schedule the COUNT&COMPARE match interrupt in NB_CLOCK_CYCLE_DELAY_SHORT
    00208    // clock cycles from now.
    00209    u32CountVal = Get_sys_count();
    00210
    00211    u32CompareVal = u32CountVal + NB_CLOCK_CYCLE_DELAY_SHORT; // WARNING: MUST FIT IN 32bits.
    00212    // If u32CompareVal ends up to be 0, make it 1 so that the COMPARE and exception
    00213    // generation feature does not get disabled.
    00214    if(0 == u32CompareVal)
    00215    {
    00216       u32CompareVal++;
    00217    }
    00218
    00219    Set_sys_compare(u32CompareVal); // GO
    00220
    00221    // Check if the previous write in the COMPARE register succeeded.
    00222    u32CompareValVerif = Get_sys_compare();
    00223    Assert( u32CompareVal==u32CompareValVerif );
    00224
    00225    //  The previous COMPARE write succeeded.
    00226    // Loop until the COUNT&COMPARE match triggers.
    00227    while (!u32NbCompareIrqTrigger)
    00228    {
    00229       u32CountNextVal = Get_sys_count();
    00230
    00231       if (u32CountNextVal < u32CompareVal)
    00232          print_dbg("COUNT HAS NOT REACHED COMPARE YET (INFO)\n");
    00233       else if (u32CountNextVal > u32CompareVal)
    00234          // This should never happen if COMPARE is not zero.
    00235          print_dbg("COUNT IS GREATER THAN COMPARE (INFO)\n");
    00236       else
    00237          print_dbg("COUNT IS EQUAL TO COMPARE (INFO)\n");
    00238       // NOTE: since the COUNT register is reset to zero upon COUNT/COMPARE match,
    00239       // the printed messages here are not "accurate".
    00240    }
    00241
    00242    while (TRUE)
    00243    {
    00244       if (u8DisplayMsg)
    00245       {
    00246          u8DisplayMsg = 0; // Reset
    00247
    00248          // Turn the current LED on only and move to next LED.
    00249          LED_Display_Field(LED_MONO0_GREEN |
    00250                            LED_MONO1_GREEN |
    00251                            LED_MONO2_GREEN |
    00252                            LED_MONO3_GREEN,
    00253                            u8LedMap);
    00254          u8LedMap = max((U8)(u8LedMap << 1) & 0x0F, 0x01);
    00255
    00256          // Print some info on the debug port.
    00257          print_dbg("\nCOMPARE INTERRUPT TRIGGERED (OK): #");
    00258          print_dbg_ulong(u32NbCompareIrqTrigger);
    00259       }
    00260    }
    00261 }

## Variable Documentation

volatile unsigned int u32NbCompareIrqTrigger = 0`[static]`

Definition at line 121 of file cycle_counter_example.c.

Referenced by compare_irq_handler(), and main().

volatile unsigned char u8DisplayMsg = 0`[static]`

Definition at line 124 of file cycle_counter_example.c.

Referenced by compare_irq_handler(), and main().