# pwm.h File Reference

## Detailed Description

PWM driver for AVR32 UC3.

This file defines a useful set of functions for the PWM interface on AVR32 devices.

- Compiler: IAR EWAVR32 and GNU GCC for AVR32
- Supported devices: All AVR32 devices with a PWM module can be used.
- AppNote:

Author:
  Atmel Corporation: http://www.atmel.com
  Support and FAQ: http://support.atmel.no/

Definition in file pwm.h.

`#include <avr32/io.h>`

Go to the source code of this file.

## Data Structures
struct | pwm_opt_t
| Input parameters when initializing a PWM channel. More...
## Defines
#define | PWM_FAILURE -1
| Value returned by function when it was unable to complete successfully for some unspecified reason.
#define | PWM_INVALID_ARGUMENT 1
| Value returned by function when the channel number is invalid.
#define | PWM_INVALID_INPUT 1
| Value returned by function when the input paramters are out of range.
#define | PWM_MODE_CENTER_ALIGNED 1
| Operate PWM channel in center aligned mode.
#define | PWM_MODE_LEFT_ALIGNED 0
| Operate PWM channel in left aligned mode.
#define | PWM_POLARITY_HIGH 1
| PWM channel starts output high level.
#define | PWM_POLARITY_LOW 0
| PWM channel starts output low level.
#define | PWM_SUCCESS 0
| Value returned by function when it completed successfully.
#define | PWM_UPDATE_DUTY 0
| PWM channel write in CUPDx updates duty cycle at the next period start event.
#define | PWM_UPDATE_PERIOD 1
| PWM channel write in CUPDx updates period at the next period start event.
## Functions
int | pwm_async_update_channel (unsigned int channel_id, const avr32_pwm_channel_t *pwm_channel)
| Update channel register CPRDx or CDTYx without synchronizing with the PWM period. This function uses the CUPDx register as a double buffer for the period or the duty cycle. Only the first 20 bits of cupd are significant.
int | pwm_channel_init (unsigned int channel_id, const avr32_pwm_channel_t *pwm_channel)
| Initialize a specific PWM channel.
int | pwm_init (const pwm_opt_t *opt)
| This function initialize the PWM controller (mode register) and disable the interrupt.
int | pwm_start_channels (unsigned long channels_bitmask)
| Start PWM channels.
int | pwm_stop_channels (unsigned long channels_bitmask)
| Stop PWM channels.
int | pwm_sync_update_channel (unsigned int channel_id, const avr32_pwm_channel_t *pwm_channel)
| Update channel register CPRDx or CDTYx by forcing synchronization with the PWM period. This function uses the CUPDx register as a double buffer for the period or the duty cycle. Only the first 20 bits of cupd are significant.

## Define Documentation

#define PWM_FAILURE -1

Value returned by function when it was unable to complete successfully for some unspecified reason.

Definition at line 57 of file pwm.h.

#define PWM_INVALID_ARGUMENT 1

Value returned by function when the channel number is invalid.

Definition at line 63 of file pwm.h.

Referenced by pwm_channel_init().

#define PWM_INVALID_INPUT 1

Value returned by function when the input paramters are out of range.

Definition at line 60 of file pwm.h.

Referenced by pwm_async_update_channel(), pwm_channel_init(), pwm_init(), pwm_start_channels(), pwm_stop_channels(), and pwm_sync_update_channel().

#define PWM_MODE_CENTER_ALIGNED 1

Operate PWM channel in center aligned mode.

Definition at line 69 of file pwm.h.

#define PWM_MODE_LEFT_ALIGNED 0

Operate PWM channel in left aligned mode.

Definition at line 66 of file pwm.h.

Referenced by main().

#define PWM_POLARITY_HIGH 1

PWM channel starts output high level.

Definition at line 75 of file pwm.h.

#define PWM_POLARITY_LOW 0

PWM channel starts output low level.

Definition at line 72 of file pwm.h.

Referenced by main().

#define PWM_SUCCESS 0

Value returned by function when it completed successfully.

Definition at line 53 of file pwm.h.

Referenced by pwm_async_update_channel(), pwm_channel_init(), pwm_init(), pwm_start_channels(), pwm_stop_channels(), and pwm_sync_update_channel().

#define PWM_UPDATE_DUTY 0

PWM channel write in CUPDx updates duty cycle at the next period start event.

Definition at line 78 of file pwm.h.

Referenced by main().

#define PWM_UPDATE_PERIOD 1

PWM channel write in CUPDx updates period at the next period start event.

Definition at line 81 of file pwm.h.

## Function Documentation

int pwm_async_update_channel | ( | unsigned int | channel_id,
|  | const avr32_pwm_channel_t * | pwm_channel |
| ) |  |  |

Update channel register CPRDx or CDTYx without synchronizing with the PWM period. This function uses the CUPDx register as a double buffer for the period or the duty cycle. Only the first 20 bits of cupd are significant.

Parameters:

  | channel_id | The channel identifier (0 to max channel-1)
  | *pwm_channel | Pointer to PWM channel struct avr32_pwm_channel_t

Returns:
  PWM_SUCCESS or PWM_INVALID_INPUT

Warning:
  Calling this function several times in a row may result in some update values never being issued to PWM if some external synchronizing mechanism like an interrupt is not used.

Note:
  This update function should be preferred when updating a PWM channel from an interrupt handler.

Definition at line 131 of file pwm.c.

References PWM_INVALID_INPUT, and PWM_SUCCESS.

    00132 {
    00133   volatile avr32_pwm_t *pwm = &AVR32_PWM;
    00134
    00135   if (channel_id > AVR32_PWM_LINES_MSB)
    00136      return PWM_INVALID_INPUT;
    00137
    00138   pwm->channel[channel_id].cmr= pwm_channel->cmr;   // Channel mode register: update of the period or duty cycle.
    00139   pwm->channel[channel_id].cupd= pwm_channel->cupd; // Channel update CPRDx or CDTYx according to CPD value in CMRx.
    00140
    00141   return PWM_SUCCESS;
    00142 }

int pwm_channel_init | ( | unsigned int | channel_id,
|  | const avr32_pwm_channel_t * | pwm_channel |
| ) |  |  |

Initialize a specific PWM channel.

Parameters:

  | channel_id | The channel identifier mask
  | *pwm_channel | Pointer to PWM channel struct avr32_pwm_channel_t

Returns:
  PWM_SUCCESS, PWM_INVALID_INPUT or PWM_INVALID_ARGUMENT

Definition at line 76 of file pwm.c.

References PWM_INVALID_ARGUMENT, PWM_INVALID_INPUT, and PWM_SUCCESS.

Referenced by main().

    00077 {
    00078   volatile avr32_pwm_t *pwm = &AVR32_PWM;
    00079
    00080   if (pwm_channel == 0) // Null pointer.
    00081     return PWM_INVALID_ARGUMENT;
    00082   if (channel_id > AVR32_PWM_LINES_MSB) // Control input values.
    00083     return PWM_INVALID_INPUT;
    00084
    00085   pwm->channel[channel_id].cmr= pwm_channel->cmr;   // Channel mode.
    00086   pwm->channel[channel_id].cdty= pwm_channel->cdty; // Duty cycle, should be < CPRD.
    00087   pwm->channel[channel_id].cprd= pwm_channel->cprd; // Channel period.
    00088
    00089   return PWM_SUCCESS;
    00090 }

int pwm_init | ( | const pwm_opt_t * | opt | ) |

This function initialize the PWM controller (mode register) and disable the interrupt.

Parameters:

  | opt | PWM Channel structure parameter

Returns:
  PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 50 of file pwm.c.

References pwm_opt_t::diva, pwm_opt_t::divb, pwm_opt_t::prea, pwm_opt_t::preb, PWM_INVALID_INPUT, and PWM_SUCCESS.

Referenced by main().

    00051 {
    00052   volatile avr32_pwm_t *pwm = &AVR32_PWM;
    00053   Bool global_interrupt_enabled = Is_global_interrupt_enabled();
    00054
    00055   if (opt == 0 ) // Null pointer.
    00056     return PWM_INVALID_INPUT;
    00057
    00058   // Disable interrupt.
    00059   if (global_interrupt_enabled) Disable_global_interrupt();
    00060   pwm->idr = ((1 << (AVR32_PWM_LINES_MSB + 1)) - 1) << AVR32_PWM_IDR_CHID0_OFFSET;
    00061   pwm->isr;
    00062   if (global_interrupt_enabled) Enable_global_interrupt();
    00063
    00064   // Set PWM mode register.
    00065   pwm->mr =
    00066     ((opt->diva)<<AVR32_PWM_DIVA_OFFSET) |
    00067     ((opt->divb)<<AVR32_PWM_DIVB_OFFSET) |
    00068     ((opt->prea)<<AVR32_PWM_PREA_OFFSET) |
    00069     ((opt->preb)<<AVR32_PWM_PREB_OFFSET)
    00070     ;
    00071
    00072   return PWM_SUCCESS;
    00073 }

int pwm_start_channels | ( | unsigned long | channels_bitmask | ) |

Start PWM channels.

Parameters:

  | channels_bitmask | A bit-mask with set bits indicating channels to start.

Returns:
  PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 93 of file pwm.c.

References PWM_INVALID_INPUT, and PWM_SUCCESS.

Referenced by main().

    00094 {
    00095   if (channels_bitmask & ~((1 << (AVR32_PWM_LINES_MSB + 1)) - 1))
    00096     return PWM_INVALID_INPUT;
    00097
    00098   AVR32_PWM.ena = channels_bitmask; // Enable channels.
    00099
    00100   return PWM_SUCCESS;
    00101 }

int pwm_stop_channels | ( | unsigned long | channels_bitmask | ) |

Stop PWM channels.

Parameters:

  | channels_bitmask | A bit-mask with set bits indicating channels to stop.

Returns:
  PWM_SUCCESS or PWM_INVALID_INPUT

Definition at line 104 of file pwm.c.

References PWM_INVALID_INPUT, and PWM_SUCCESS.

Referenced by main().

    00105 {
    00106   if (channels_bitmask & ~((1 << (AVR32_PWM_LINES_MSB + 1)) - 1))
    00107     return PWM_INVALID_INPUT;
    00108
    00109   AVR32_PWM.dis = channels_bitmask; // Disable channels.
    00110
    00111   return PWM_SUCCESS;
    00112 }

int pwm_sync_update_channel | ( | unsigned int | channel_id,
|  | const avr32_pwm_channel_t * | pwm_channel |
| ) |  |  |

Update channel register CPRDx or CDTYx by forcing synchronization with the PWM period. This function uses the CUPDx register as a double buffer for the period or the duty cycle. Only the first 20 bits of cupd are significant.

Parameters:

  | channel_id | The channel identifier (0 to max channel-1)
  | *pwm_channel | Pointer to PWM channel struct avr32_pwm_channel_t

Returns:
  PWM_SUCCESS or PWM_INVALID_INPUT

Note:
  This update function should be preferred when updating a PWM channel by polling.

Definition at line 115 of file pwm.c.

References PWM_INVALID_INPUT, and PWM_SUCCESS.

    00116 {
    00117   volatile avr32_pwm_t *pwm = &AVR32_PWM;
    00118
    00119   if (channel_id > AVR32_PWM_LINES_MSB)
    00120      return PWM_INVALID_INPUT;
    00121
    00122   AVR32_PWM.isr;                                    // Acknowledgement and clear previous register state.
    00123   pwm->channel[channel_id].cmr= pwm_channel->cmr;   // Channel mode register: update of the period or duty cycle.
    00124   while (!(AVR32_PWM.isr & (1 << channel_id)));     // Wait until the last write has been taken into account.
    00125   pwm->channel[channel_id].cupd= pwm_channel->cupd; // Channel update CPRDx or CDTYx according to CPD value in CMRx.
    00126
    00127   return PWM_SUCCESS;
    00128 }