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caam_driver.h
1/* caam_driver.h
2 *
3 * Copyright (C) 2006-2020 wolfSSL Inc.
4 *
5 * This file is part of wolfSSL.
6 *
7 * wolfSSL is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * wolfSSL is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
20 */
21
22#ifndef CAAM_DRIVER_H
23#define CAAM_DRIVER_H
24
25#define CAAM_BASE 0xf2100000
26
27#define CAAM_PAGE 0xf0100000
28#define CAAM_PAGE_MAX 6
29
30/******************************************************************************
31 Basic Descriptors
32 ****************************************************************************/
33
34/* descriptor commands */
35#define CAAM_KEY 0x00000000
36#define CAAM_LOAD 0x10000000
37#define CAAM_LOAD_CTX 0x10200000
38#define CAAM_IMM 0x00800000
39#define CAAM_FIFO_L 0x20000000
40#define CAAM_FIFO_S 0x60000000
41#define CAAM_FIFO_S_SKEY 0x60260000
42#define CAAM_STORE 0x50000000
43#define CAAM_STORE_CTX 0x50200000
44#define CAAM_MOVE 0x78000000
45#define CAAM_OP 0x80000000
46#define CAAM_SIG 0x90000000
47#define CAAM_JUMP 0xA0000000
48#define CAAM_SEQI 0xF0000000/* SEQ in */
49#define CAAM_SEQO 0xF8000000/* SEQ out */
50#define CAAM_HEAD 0xB0800000
51#define CAAM_NWB 0x00200000
52
53#define CAAM_BLOB_ENCAP 0x07000000
54#define CAAM_BLOB_DECAP 0x06000000
55#define CAAM_OPID_BLOB 0x000D0000
56
57/* algorithms modes and types */
58#define CAAM_CLASS1 0x02000000/* i.e. AES */
59#define CAAM_CLASS2 0x04000000/* i.e. hash algos */
60
61#define CAAM_ENC 0x00000001
62#define CAAM_DEC 0x00000000
63#define CAAM_ALG_INIT 0x00000004
64#define CAAM_ALG_INITF 0x0000000C
65#define CAAM_ALG_UPDATE 0x00000000
66#define CAAM_ALG_FINAL 0x00000008
67
68 /* AES 10h */
69#define CAAM_AESCTR 0x00100000
70#define CAAM_AESCBC 0x00100100
71#define CAAM_AESECB 0x00100200
72#define CAAM_AESCFB 0x00100300
73#define CAAM_AESOFB 0x00100400
74#define CAAM_CMAC 0x00100600
75#define CAAM_AESCCM 0x00100800
76
77 /* HASH 40h */
78#define CAAM_MD5 0x00400000
79#define CAAM_SHA 0x00410000
80#define CAAM_SHA224 0x00420000
81#define CAAM_SHA256 0x00430000
82#define CAAM_SHA384 0x00440000
83#define CAAM_SHA512 0x00450000
84
85 /* HMAC 40h + 10 AAI */
86#define CAAM_HMAC_MD5 0x00400010
87#define CAAM_HMAC_SHA 0x00410010
88#define CAAM_HMAC_SHA224 0x00420010
89#define CAAM_HMAC_SHA256 0x00430010
90#define CAAM_HMAC_SHA384 0x00440010
91#define CAAM_HMAC_SHA512 0x00450010
92
93#define CAAM_MD5_CTXSZ (16 + 8)
94#define CAAM_SHA_CTXSZ (20 + 8)
95#define CAAM_SHA224_CTXSZ (32 + 8)
96#define CAAM_SHA256_CTXSZ (32 + 8)
97#define CAAM_SHA384_CTXSZ (64 + 8)
98#define CAAM_SHA512_CTXSZ (64 + 8)
99
100 /* RNG 50h */
101#define CAAM_RNG 0x00500000
102
103 /* Used to get raw entropy from TRNG */
104#define CAAM_ENTROPY 0x00500001
105
106#define FIFOL_TYPE_MSG 0x00100000
107#define FIFOL_TYPE_AAD 0x00300000
108#define FIFOL_TYPE_FC1 0x00010000
109#define FIFOL_TYPE_LC1 0x00020000
110#define FIFOL_TYPE_LC2 0x00040000
111
112#define FIFOS_TYPE_MSG 0x00300000
113
114/* continue bit set if more output is expected */
115#define CAAM_FIFOS_CONT 0x00800000
116
117#define CAAM_PAGE_SZ 4096
118
119/* RNG Registers */
120#define CAAM_RTMCTL CAAM_BASE + 0X0600
121#define CAAM_RTSDCTL CAAM_BASE + 0X0610
122#define CAAM_RTFRQMIN CAAM_BASE + 0X0618
123#define CAAM_RTFRQMAX CAAM_BASE + 0X061C
124#define CAAM_RDSTA CAAM_BASE + 0X06C0
125#define CAAM_RTSTATUS CAAM_BASE + 0x063C
126
127/* each of the following 11 RTENT registers are an offset of 4 from RTENT0 */
128#define CAAM_RTENT0 CAAM_BASE + 0x0640
129#define CAAM_RTENT11 CAAM_BASE + 0x066C /* Max RTENT register */
130
131/* RNG Masks/Values */
132#ifndef CAAM_ENT_DLY
133 #define CAAM_ENT_DLY 1200 /* @TODO lower value may gain performance */
134#endif
135#define CAAM_PRGM 0x00010000 /* Set RTMCTL to program state */
136#define CAAM_TRNG 0x00000020 /* Set TRNG access */
137#define CAAM_CTLERR 0x00001000
138#define CAAM_ENTVAL 0x00000400 /* checking RTMCTL for entropy ready */
139
140/* Input Job Ring Registers */
141#define CAAM_IRBAR0 CAAM_BASE + 0x1004
142#define CAAM_IRSR0 CAAM_BASE + 0x100C
143#define CAAM_IRJAR0 CAAM_BASE + 0x101C
144
145/* Output Job Ring Registers */
146#define CAAM_ORBAR0 CAAM_BASE + 0x1024
147#define CAAM_ORSR0 CAAM_BASE + 0x102C
148#define CAAM_ORJAR0 CAAM_BASE + 0x103C
149
150
151/* Status Registers */
152#define CAAM_STATUS CAAM_BASE + 0x0FD4
153#define CAAM_VERSION_MS CAAM_BASE + 0x0FE8
154#define CAAM_VERSION_LS CAAM_BASE + 0x0FEC
155#define CAMM_SUPPORT_MS CAAM_BASE + 0x0FF0
156#define CAMM_SUPPORT_LS CAAM_BASE + 0x0FF4
157
158
159#define CAAM_C1DSR_LS CAAM_BASE + 0x8014
160#define CAAM_C1MR CAAM_BASE + 0x8004
161
162
163/* output FIFO is 16 entries deep and each entry has a two 4 byte registers */
164#define CAAM_FIFOO_MS CAAM_BASE + 0x87F0
165#define CAAM_FIFOO_LS CAAM_BASE + 0x87F4
166
167/* input FIFO is 16 entries deep with each entry having two 4 byte registers
168 All data written to it from IP bus should be in big endian format */
169#define CAAM_FIFOI_LS CAAM_BASE + 0x87E0
170
171/* offset of 4 with range 0 .. 13 */
172#define CAAM_CTX1 CAAM_BASE + 0x8100
173#define CAAM_CTRIV CAAM_CTX1 + 8 /* AES-CTR iv is in 2 and 3 */
174#define CAAM_CBCIV CAAM_CTX1 /* AES-CBC iv is in 1 and 2 */
175
176
177/* instantiate RNG and create JDKEK, TDKEK, and TDSK key */
178static unsigned int wc_rng_start[] = {
179 CAAM_HEAD | 0x00000006,
180 CAAM_OP | CAAM_CLASS1 | CAAM_RNG | 0x00000004, /* Instantiate RNG handle 0 with TRNG */
181 CAAM_JUMP | 0x02000001, /* wait for Class1 RNG and jump to next cmd */
182 CAAM_LOAD | 0x00880004, /* Load to clear written register */
183 0x00000001, /* reset done interrupt */
184 CAAM_OP | CAAM_CLASS1 | CAAM_RNG | 0x00001000 /* Generate secure keys */
185};
186
187#endif /* CAAM_DRIVER_H */