
Support for the STM32 L4, F1, F2, F4 and F7 on-board crypto hardware acceleration for symmetric AES (ECB/CBC/CTR/GCM) and MD5/SHA1/SHA224/SHA256.
Support for the STSAFE-A100 crypto hardware accelerator co-processor via I2C for ECC supporting NIST or Brainpool 256-bit and 384-bit curves. It requires the ST-Safe SDK including wolf stsafe_interface.c/.h files. Please contact ST for these.
For details see our wolfSSL ST page.
We support using the STM32 CubeMX and Standard Peripheral Library.
To enable support define one of the following:
To use CubeMX define WOLFSSL_STM32_CUBEMX otherwise StdPeriLib is used.
To disable portions of the hardware acceleration you can optionally define:
In your application you must include <wolfssl/wolfcrypt/settings.h> before any other wolfSSL headers. If building the sources directly we recommend defining WOLFSSL_USER_SETTINGS and adding your own user_settings.h file. You can find a good reference for this in IDE/GCC-ARM/Header/user_settings.h.
See our benchmarks on the wolfSSL website.
Using the wolfSSL PK callbacks and the reference ST Safe reference API's we support an ECC only cipher suite such as ECDHE-ECDSA-AES128-SHA256 for TLS client or server.
At the wolfCrypt level we also support ECC native API's for wc_ecc_* using the ST-Safe.
./configure --enable-pkcallbacks CFLAGS="-DWOLFSSL_STSAFEA100"
or
#define HAVE_PK_CALLBACKS #define WOLFSSL_STSAFEA100
Setup the PK callbacks for TLS using:
The reference STSAFE-A100 PK callback functions are located in the wolfcrypt/src/port/st/stsafe.c file.
Adding a custom context to the callbacks:
Software only implementation (STM32L4 120Mhz, Cortex-M4, Fast Math):
Memory Use:
STSAFE-A100 acceleration:
Memory Use:
Email us at support@wolfssl.com.