perf_opt.h

Go to the documentation of this file.

 
#ifndef TBCI_PERF_OPT_H
#define TBCI_PERF_OPT_H
 
/* gcc-4:
 * The user should use -funroll-loops -fvectorize-trees 
 * and -fprefetch-loop-arrays as needed.
 */
#if defined(__GNUC__) && __GNUC__ >= 4 && !defined(USE_PLAIN_VEC_KERNELS) \
                && !defined(USE_UNR_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS2)
# define USE_PLAIN_VEC_KERNELS
#endif
 
/* DEC Alpha architecture */
#ifdef __alpha__
# define DEF_CACHELINE_SZ 32
# ifdef __GNUC__
#  if __GNUC__ <= 2
#   if !defined(USE_PLAIN_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS2)
//#    define USE_PLAIN_VEC_KERNELS
#    define USE_UNR_VEC_KERNELS
#   endif
#   define DEF_UNROLL_DEPTH 8
#   define DEF_PREFETCH_AHEAD 8
#  else /* gcc 3 */
#   if !defined(USE_PLAIN_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS2)
#    define USE_UNR_VEC_KERNELS
#   endif
#   define DEF_UNROLL_DEPTH 8
#   define DEF_PREFETCH_AHEAD 8
#  endif
# else /* DEC/Compaq/HP compiled */
#  if !defined(USE_PLAIN_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS2)
#   define USE_UNR_VEC_KERNELS
#  endif
#  define DEF_UNROLL_DEPTH 1
#  define DEF_PREFETCH_AHEAD 4
# endif
#endif
 
/* iA32 arch */
#if defined(__i386__) || defined(__x86_64__)
# if defined(OPT_PENTIUM4) || defined(OPT_CORE2) || defined(__x86_64__)
#  define DEF_CACHELINE_SZ 64
# else
#  define DEF_CACHELINE_SZ 32
# endif
# ifdef __GNUC__
#  ifdef OPT_PENTIUM4
#   if __GNUC__ <= 2
#    if !defined(USE_PLAIN_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS2)
#     define USE_UNR_VEC_KERNELS
#    endif
#    define DEF_UNROLL_DEPTH 1  /* Hopefully -funroll-loops is enabled */
#    define DEF_PREFETCH_AHEAD 4
#   else /* gcc >= 3 */
#    if !defined(USE_PLAIN_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS2)
#     define USE_PLAIN_VEC_KERNELS      /* P4 does HW prefetch */
#    endif
#    define DEF_UNROLL_DEPTH 4
#    define DEF_PREFETCH_AHEAD 16
#    if !defined(FORCE_PREFETCH) && !defined(NO_PREFETCH)
#     define NO_PREFETCH        /* P4 does HW prefetch */
#    endif
#   endif
#  elif defined(OPT_PENTIUM3) || defined(OPT_CORE2) || defined(SSE_PREFETCH)    /* Pentium M / 3 */
#   if !defined(FORCE_PREFETCH) && !defined(NO_PREFETCH)
#    define NO_PREFETCH /* Pentium-M does HW prefetch, Pentium-3 does not ... */
#   endif
#   if !defined(SSE_PREFETCH) && defined(OPT_ARCH_PENTIUM3) &&!defined(NO_PREFETCH)
#    define SSE_PREFETCH
#   endif
#   if !defined(USE_PLAIN_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS2)
#    define USE_UNR_VEC_KERNELS
#   endif
#   define DEF_UNROLL_DEPTH 4
#   define DEF_PREFETCH_AHEAD 8
#  elif defined(OPT_ATHLON) || defined(AMD_PREFETCH)    /* Athlon / Opteron */
#   if !defined(FORCE_PREFETCH) && !defined(NO_PREFETCH) && defined(__x86_64__)
#    define NO_PREFETCH /* AMD64 does HW prefetch */
#   endif
#   if !defined(AMD_PREFETCH) && defined(OPT_ARCH_ATHLON) && !defined(NO_PREFETCH) 
#    define AMD_PREFETCH
#   endif
#   if !defined(USE_PLAIN_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS2)
#    define USE_UNR_VEC_KERNELS
#   endif
#   define DEF_UNROLL_DEPTH 1   /* Hopefully -funroll-loops is enabled */
#   define DEF_PREFETCH_AHEAD 8
#  else /* deflt proc */
#   if !defined(USE_PLAIN_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS2)
#    define USE_UNR_VEC_KERNELS
#   endif
#   define DEF_UNROLL_DEPTH 8
#   define DEF_PREFETCH_AHEAD 4
#  endif
# else /* ! __GNUC__ */
#  if !defined(USE_PLAIN_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS2)
#   define USE_UNR_VEC_KERNELS
#  endif
#  define DEF_UNROLL_DEPTH 8
#  define DEF_PREFETCH_AHEAD 8
# endif
#endif /* __i386__ || __x86_64__*/
 
/* defaults */
#if !defined(USE_PLAIN_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS) && !defined(USE_UNR_VEC_KERNELS2)
# define USE_PLAIN_VEC_KERNELS
#endif
#ifndef DEF_UNROLL_DEPTH
# define DEF_UNROLL_DEPTH 4
#endif
#ifndef DEF_PREFETCH_AHEAD
# define DEF_PREFETCH_AHEAD 4
#endif
#ifndef DEF_CACHELINE_SZ
# ifdef __WORDSIZE      // Heuristics: Most 64bit arches have 64byte cache lines
#  define DEF_CACHELINE_SZ __WORDSIZE
# else
#  define DEF_CACHELINE_SZ 32
# endif
#endif

#define DEF_CACHE_LOC_READ  2
#define DEF_CACHE_LOC_WRITE 3
 
/* Apply defaults */

#ifndef PREFETCH_AHEAD
# define PREFETCH_AHEAD DEF_PREFETCH_AHEAD
#endif
#ifndef UNROLL_DEPTH
# define UNROLL_DEPTH DEF_UNROLL_DEPTH
#endif
#ifndef CACHELINE_SZ
# define CACHELINE_SZ DEF_CACHELINE_SZ
#endif
#ifndef CACHE_LOC_READ
# define CACHE_LOC_READ  DEF_CACHE_LOC_READ
#endif
#ifndef CACHE_LOC_WRITE
# define CACHE_LOC_WRITE DEF_CACHE_LOC_WRITE
#endif
 
// Those should be evaluated at compile time
#define EL_PER_CL(T) (signed)((CACHELINE_SZ/sizeof( T ))?(CACHELINE_SZ/sizeof( T )):1)
#define PREF_OFFS(T) (EL_PER_CL(T)*PREFETCH_AHEAD)
 
#endif  /* TBCI_PERF_OPT_H */