head	1.2;
access;
symbols
	rel_1_1:1.2
	rel_1_0:1.2
	rel_0_6_1_beta:1.2
	rel_0_6__beta:1.2
	rel_0_6_beta:1.2
	rel_0_5_beta:1.2
	rel_0_4_beta:1.2
	rel_0_3_beta:1.2
	rel_0_2_beta:1.2
	rel_0_1_beta:1.2
	transfer:1.1.1.1
	local:1.1.1;
locks; strict;
comment	@;; @;


1.2
date	2004.03.26.22.37.12;	author arniml;	state Exp;
branches;
next	1.1;

1.1
date	2004.03.25.22.29.16;	author arniml;	state Exp;
branches
	1.1.1.1;
next	;

1.1.1.1
date	2004.03.25.22.29.16;	author arniml;	state Exp;
branches;
next	;


desc
@@


1.2
log
@fix constant format
@
text
@	;; *******************************************************************
	;; $Id: test.asm,v 1.1.1.1 2004/03/25 22:29:16 arniml Exp $
	;;
	;; Test JNZ instruction.
	;; *******************************************************************

	INCLUDE	"cpu.inc"
	INCLUDE	"pass_fail.inc"

	ORG	0

	;; Start of test
	mov	a, #000H
	jnz	fail

	mov	a, #001H
	jnz	ok_01
	jmp	fail

ok_01:	mov	a, #002H
	jnz	ok_02
	jmp	fail

ok_02:	mov	a, #004H
	jnz	ok_04
	jmp	fail

ok_04:	mov	a, #008H
	jnz	ok_08
	jmp	fail

ok_08:	mov	a, #010H
	jnz	ok_10
	jmp	fail

ok_10:	mov	a, #020H
	jnz	ok_20
	jmp	fail

ok_20:	mov	a, #040H
	jnz	ok_40
	jmp	fail

ok_40:	mov	a, #080H
	jnz	pass

fail:	FAIL

pass:	PASS
@


1.1
log
@Initial revision
@
text
@d2 1
a2 1
	;; $Id: test.asm,v 1.1 2004/03/11 22:29:32 arnim Exp $
d13 1
a13 1
	mov	a, #0x00
d16 1
a16 1
	mov	a, #0x01
d20 1
a20 1
ok_01:	mov	a, #0x02
d24 1
a24 1
ok_02:	mov	a, #0x04
d28 1
a28 1
ok_04:	mov	a, #0x08
d32 1
a32 1
ok_08:	mov	a, #0x10
d36 1
a36 1
ok_10:	mov	a, #0x20
d40 1
a40 1
ok_20:	mov	a, #0x40
d44 1
a44 1
ok_40:	mov	a, #0x80
@


1.1.1.1
log
@Imported sources
@
text
@@