head	1.2;
access;
symbols
	rel_1_1:1.2
	rel_1_0:1.2
	rel_0_6_1_beta:1.2
	rel_0_6__beta:1.2
	rel_0_6_beta:1.2
	rel_0_5_beta:1.2
	rel_0_4_beta:1.1.1.1
	rel_0_3_beta:1.1.1.1
	rel_0_2_beta:1.1.1.1
	rel_0_1_beta:1.1.1.1
	transfer:1.1.1.1
	local:1.1.1;
locks; strict;
comment	@;; @;


1.2
date	2004.10.25.19.33.13;	author arniml;	state Exp;
branches;
next	1.1;

1.1
date	2004.03.25.22.29.18;	author arniml;	state Exp;
branches
	1.1.1.1;
next	;

1.1.1.1
date	2004.03.25.22.29.18;	author arniml;	state Exp;
branches;
next	;


desc
@@


1.2
log
@disable external memory to avoid conflicts with outl a, bus
@
text
@	;; *******************************************************************
	;; $Id: test.asm,v 1.1.1.1 2004/03/25 22:29:18 arniml Exp $
	;;
	;; Test INS A, BUS.
	;; *******************************************************************

	INCLUDE	"cpu.inc"
	INCLUDE	"pass_fail.inc"

	ORG	0

	;; Start of test

	;; deselect external memory
	mov	r0, #0FFH
	clr	a
	movx	@@r0, a

	mov	a, #055H
	outl	bus, a

	clr	a
	ins	a, bus
	add	a, #0ABH
	jnz	fail

	mov	a, #0AAH
	outl	bus, a

	clr	a
	ins	a, bus
	add	a, #056H
	jnz	fail

pass:	PASS

fail:	FAIL
@


1.1
log
@Initial revision
@
text
@d2 1
a2 1
	;; $Id: test.asm,v 1.1 2004/03/21 13:14:25 arnim Exp $
d13 6
@


1.1.1.1
log
@Imported sources
@
text
@@