head	1.2;
access;
symbols
	rel_1_1:1.2
	rel_1_0:1.2
	rel_0_6_1_beta:1.2
	rel_0_6__beta:1.2
	rel_0_6_beta:1.2
	rel_0_5_beta:1.1
	rel_0_4_beta:1.1
	rel_0_3_beta:1.1
	rel_0_2_beta:1.1
	rel_0_1_beta:1.1;
locks; strict;
comment	@# @;


1.2
date	2005.06.11.10.08.43;	author arniml;	state Exp;
branches;
next	1.1;
commitid	459c42aab8184567;

1.1
date	2004.03.23.21.31.52;	author arniml;	state Exp;
branches;
next	;


desc
@@


1.2
log
@introduce prefix 't48_' for all packages, entities and configurations
@
text
@-------------------------------------------------------------------------------
--
-- $Id: cond_branch_pack-p.vhd,v 1.1 2004/03/23 21:31:52 arniml Exp $
--
-- Copyright (c) 2004, Arnim Laeuger (arniml@@opencores.org)
--
-- All rights reserved
--
-------------------------------------------------------------------------------

library ieee;
use ieee.std_logic_1164.all;

package t48_cond_branch_pack is

  -----------------------------------------------------------------------------
  -- The branch conditions.
  -----------------------------------------------------------------------------
  type branch_conditions_t is (COND_ON_BIT, COND_Z,
                               COND_C,
                               COND_F0, COND_F1,
                               COND_INT,
                               COND_T0, COND_T1,
                               COND_TF);

  subtype comp_value_t is std_logic_vector(2 downto 0);

end t48_cond_branch_pack;


-------------------------------------------------------------------------------
-- File History:
--
-- $Log: cond_branch_pack-p.vhd,v $
-- Revision 1.1  2004/03/23 21:31:52  arniml
-- initial check-in
--
-------------------------------------------------------------------------------
@


1.1
log
@initial check-in
@
text
@d3 1
a3 1
-- $Id: cond_branch_pack-p.vhd,v 1.2 2004/03/17 22:19:59 arnim Exp $
d14 1
a14 1
package cond_branch_pack is
d28 1
a28 1
end cond_branch_pack;
d34 3
a36 1
-- $Log$
@