head	1.2;
access;
symbols
	bg1_07:1.1
	bg1_06:1.1
	bg1_05:1.1
	TAL_101:1.1
	TAL_100:1.1
	jtres_submission:1.1
	wises06_submission:1.1
	lctes2006_submission:1.1;
locks; strict;
comment	@:: @;


1.2
date	2007.03.27.15.46.51;	author martin;	state dead;
branches;
next	1.1;
commitid	645746093c694567;

1.1
date	2006.01.30.13.13.56;	author martin;	state Exp;
branches;
next	;
commitid	63f743de110e4567;


desc
@@


1.2
log
@moved to test_bench
@
text
@set REL= .\test_bench

vlib work

vcom fpupack.vhd
vcom pre_norm_addsub.vhd
vcom addsub_28.vhd
vcom post_norm_addsub.vhd
vcom pre_norm_mul.vhd
vcom mul_24.vhd
vcom serial_mul.vhd
vcom post_norm_mul.vhd
vcom pre_norm_div.vhd
vcom serial_div.vhd
vcom post_norm_div.vhd
vcom pre_norm_sqrt.vhd
vcom sqrt.vhd
vcom post_norm_sqrt.vhd
vcom comppack.vhd
vcom fpu.vhd

rem *** compile FPU II only for testing.
rem ***Usselmann's FPU is used here
vlog %REL%\FPU_II\pre_norm.v
vlog %REL%\FPU_II\pre_norm_fmul.v
vlog %REL%\FPU_II\primitives.v
vlog %REL%\FPU_II\except.v
vlog %REL%\FPU_II\post_norm.v
vlog %REL%\FPU_II\fpu.v

vcom %REL%\tb_fpu.vhd



pause Start simulation?


vsim -do fpu_wave.do tb_fpu


@


1.1
log
@Add FPU (Jidan Al-Eryani) to JOP
@
text
@@