head	1.7;
access;
symbols
	jtres_submission:1.6
	thesis:1.4;
locks; strict;
comment	@# @;


1.7
date	2006.08.11.13.00.14;	author martin;	state dead;
branches;
next	1.6;
commitid	2a0f44dc7f5c4567;

1.6
date	2005.05.11.18.13.16;	author martin;	state Exp;
branches;
next	1.5;
commitid	433f42824b3a4567;

1.5
date	2005.05.11.17.15.45;	author martin;	state dead;
branches;
next	1.4;
commitid	2ba742823dc04567;

1.4
date	2004.09.10.07.47.47;	author martin;	state Exp;
branches;
next	1.3;

1.3
date	2004.09.10.07.47.45;	author martin;	state Exp;
branches;
next	1.2;

1.2
date	2004.04.07.18.32.10;	author martin;	state Exp;
branches;
next	1.1;

1.1
date	2004.04.04.22.11.31;	author martin;	state Exp;
branches;
next	;


desc
@@


1.7
log
@clean up
@
text
@# Copyright (C) 1991-2004 Altera Corporation
# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
# support information,  device programming or simulation file,  and any other
# associated  documentation or information  provided by  Altera  or a partner
# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
# other  use  of such  megafunction  design,  netlist,  support  information,
# device programming or simulation file,  or any other  related documentation
# or information  is prohibited  for  any  other purpose,  including, but not
# limited to  modification,  reverse engineering,  de-compiling, or use  with
# any other  silicon devices,  unless such use is  explicitly  licensed under
# a separate agreement with  Altera  or a megafunction partner.  Title to the
# intellectual property,  including patents,  copyrights,  trademarks,  trade
# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
# support  information,  device programming or simulation file,  or any other
# related documentation or information provided by  Altera  or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.



QUARTUS_VERSION = "4.1"
DATE = "13:04:33  September 09, 2004"


# Revisions

PROJECT_REVISION = "jop"
@


1.6
log
@resync with current development
@
text
@@


1.5
log
@resync with current development
@
text
@@


1.4
log
@resync of actual development.
@
text
@@


1.3
log
@resync of actual development.
@
text
@d23 2
a24 2
QUARTUS_VERSION = "4.0"
DATE = "10:25:47  July 12, 2004"
d27 1
a27 1
# Active Revisions
@


1.2
log
@Tuning of bytecode and microcode fetch.
10 bits ROM instead of 8 bits plus bcftbl-table.
Jopa generates an additional generic VHDL
file for the microinstruction ROM (rom.vhd).
@
text
@d24 1
a24 1
DATE = "20:08:35  April 07, 2004"
@


1.1
log
@New project files for Quartus II V4.0.
@
text
@d24 1
a24 1
DATE = "02:30:15  April 04, 2004"
@