head	1.9;
access;
symbols
	bg2_23:1.9
	bg2_22:1.9
	bg2_21:1.9
	bg2_20:1.9
	bg2_16:1.9
	bg2_15:1.9
	bg2_12:1.9
	bg2_07:1.9
	isorc2008_submission:1.8
	handbook_alpha_edition:1.8
	jtres2007_submission:1.8
	bg1_07:1.7
	bg1_06:1.6
	bg1_05:1.6
	TAL_101:1.5
	TAL_100:1.5
	jtres_submission:1.5
	wises06_submission:1.5
	lctes2006_submission:1.5
	rtgc_isorc2006:1.2.0.4
	isorc2006:1.2.0.2
	rtgc_paper:1.2
	bg1_00:1.2
	nohandle:1.2
	thesis:1.2;
locks; strict;
comment	@# @;


1.9
date	2008.02.23.23.41.05;	author martin;	state Exp;
branches;
next	1.8;
commitid	135e47c0af0e4567;

1.8
date	2007.03.13.20.30.15;	author martin;	state Exp;
branches;
next	1.7;
commitid	70045f709d54567;

1.7
date	2006.12.29.16.13.20;	author martin;	state Exp;
branches;
next	1.6;
commitid	3ce845953e9d4567;

1.6
date	2006.11.04.23.28.01;	author martin;	state Exp;
branches;
next	1.5;
commitid	23e6454d21f84567;

1.5
date	2006.01.23.12.06.45;	author martin;	state Exp;
branches;
next	1.4;
commitid	495d43d4c6c14567;

1.4
date	2006.01.22.18.23.18;	author martin;	state Exp;
branches;
next	1.3;
commitid	22cb43d3cd8e4567;

1.3
date	2006.01.22.12.25.12;	author martin;	state Exp;
branches;
next	1.2;
commitid	465143d379984567;

1.2
date	2004.09.16.20.00.15;	author martin;	state Exp;
branches;
next	1.1;

1.1
date	2004.09.10.07.58.52;	author martin;	state Exp;
branches;
next	;


desc
@@


1.9
log
@JOP goes GPL
@
text
@//
//  This file is a part of JOP, the Java Optimized Processor
//
//  Copyright (C) 2001-2008, Martin Schoeberl (martin@@jopdesign.com)
//
//  This program is free software: you can redistribute it and/or modify
//  it under the terms of the GNU General Public License as published by
//  the Free Software Foundation, either version 3 of the License, or
//  (at your option) any later version.
//
//  This program is distributed in the hope that it will be useful,
//  but WITHOUT ANY WARRANTY; without even the implied warranty of
//  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
//  GNU General Public License for more details.
//
//  You should have received a copy of the GNU General Public License
//  along with this program.  If not, see <http://www.gnu.org/licenses/>.
//

//
//	Include file for long bytecodes
//
//	Arrangement of longs in the memory:
//		as usual in Java - high word first (at lower address)
//		thet stack grows to higher addresses => TOS is LOWER part
//		of long!

// lreturn: is in jvm_call.inc

ldc2_w:	
			ldm	cp opd
			nop	opd
			ld_opd_16u
			add
			dup

			stmra				// read ext. mem, mem_bsy comes one cycle later

			ldi	1
			add					// address for next word

			wait
			wait

			ldmrd		 		// first word
			stm	a

			stmra				// read ext. mem, mem_bsy comes one cycle later
			ldm	a				// first word again on stack
			wait
			wait
			ldmrd		 nxt	// second word

lconst_0:	ldi	0
			ldi 0 nxt
lconst_1:	ldi	0
			ldi 1 nxt			// TOS is low part

l2i:		stm	a				// low part
			pop					// drop high word
			ldm	a nxt			// low on stack

dload_0:
lload_0:	ld0				// high word
			ld1 nxt			// low word
dload_1:
lload_1:	ld1
			ld2 nxt
dload_2:
lload_2:	ld2
			ld3 nxt
dload_3:
lload_3:	ldvp			// there is no ld4
			dup
			ldi	1
			add
			stvp
			stm	a
			ld2	
			ld3	
			ldm	a			// restore vp
			stvp
			nop nxt

dload:
lload:		ldvp
			dup opd
			ld_opd_8u
			add
			stvp
			stm	a
			ld0
			ld1
			ldm	a
			stvp
			nop	nxt

dstore_0:
lstore_0:	st1				// low word
			st0 nxt			// high word
dstore_1:
lstore_1:	st2
			st1 nxt
dstore_2:
lstore_2:	st3
			st2 nxt
dstore_3:
lstore_3:	ldvp			// there is no ld4
			dup
			ldi	1
			add
			stvp
			stm	a
			st3	
			st2	
			ldm	a			// restore vp
			stvp
			nop nxt

dstore:
lstore:		ldvp
			dup opd
			ld_opd_8u
			add
			stvp
			stm	a
			st1
			st0
			ldm	a
			stvp
			nop	nxt

getstatic_long:
				// int idx = readOpd16u();
				// int addr = readMem(cp+idx);
				// stack[++sp] = readMem(addr);
				// stack[++sp] = readMem(addr+1);

			ldm	cp opd
			nop	opd
			ld_opd_16u
			add

			stmra				// read ext. mem, mem_bsy comes one cycle later
			wait
			wait
			ldmrd		 	// read ext. mem
long_read:
			dup

			stmra
			ldi	1
			add
			stm	a
			wait
			wait
			ldmrd				// read high word

			ldm	a
			stmra
			wait
			wait
			ldmrd	nxt			// read low word


putstatic_long:
				// int idx = readOpd16u();
				// int addr = readMem(cp+idx);
				// writeMem(addr+1, stack[sp--]);
				// writeMem(addr, stack[sp--]);

			stm	b				// save low word
			stm	a				// save high word
			// could also be done to keep values on
			// stack, but first store at addr+1 (like 
			// in Java simulation)

			ldm	cp opd
			nop	opd
			ld_opd_16u
			add

			stmra				// read ext. mem, mem_bsy comes one cycle later
			wait
			wait
			ldmrd		 	// read ext. mem

			dup

			stmwa				// write ext. mem address
			ldm	a				// restore value
			stmwd				// write ext. mem data
			ldi	1
			add
			wait
			wait

			stmwa
			ldm	b
			stmwd
			wait
			wait
			nop	nxt

getfield_long:
				// int off = readOpd16u();
				// int ref = stack[sp];
				// if (useHandle) {
				//	// handle needs indirection
				//	ref = readMem(ref);
				// }
				// stack[sp] = readMem(ref+off);
				// stack[++sp] = readMem(ref+off+1);

			dup					// null pointer check
			nop					// could be interleaved with
			bz	null_pointer	// following code
			nop
			nop

			stmra				// read handle indirection
			wait				// for the GC
			wait
			ldmrd

			nop	opd
			nop	opd
			ld_opd_16u			// CP index is the offset for the field
			add					// +objectref

			dup

			stmra
			ldi	1
			add
			stm	a
			wait
			wait
			ldmrd				// read high word

			ldm	a
			stmra
			wait
			wait
			ldmrd	nxt			// read low word


putfield_long:
				// int off = readOpd16u();
				// int val_l = stack[sp--];
				// int val_h = stack[sp--];
				// int ref = stack[sp--];
				// if (useHandle) {
				// 	// handle needs indirection
				// 	ref = readMem(ref);
				// }
				// writeMem(ref+off, val_h);
				// writeMem(ref+off+1, val_l);

			stm	b				// save low word
			stm	a				// save high word

			dup					// null pointer check
			nop					// could be interleaved with
			bz	null_pointer	// following code
			nop
			nop

			stmra				// read handle indirection
			wait				// for the GC
			wait
			ldmrd

			nop	opd
			nop	opd
			ld_opd_16u			// CP index is the offset for the field
			add					// +objectref

			dup

			stmwa				// write ext. mem address
			ldm	a				// restore value
			stmwd				// write ext. mem data
			ldi	1
			add
			wait
			wait

			stmwa
			ldm	b
			stmwd
			wait
			wait
			nop	nxt

lastore:
			stm	a				// value_h
			stm c               // value_l
			stm	b				// index
			// arrayref is TOS
			dup					// for null pointer check
			dup					// for bound check, one cycle wait for bz
			bz	null_pointer	// 
			// we do the following in the
			// branch slot -> one more element
			// from the former dup on the stack
			ldi	1
			add					// arrayref+1
			stmra				// read ext. mem, mem_bsy comes one cycle later
			wait				// is this ok? - wait in branch slot
			wait
			ldmrd		 		// read ext. mem (array length)

			ldi	1
			sub					// length-1
			ldm	b				// index
			sub					// TOS = length-1-index
			ldm	b				// check if index is negativ
			or					// is one of both checks neagtv?
         	ldi	-2147483648		//  0x80000000
			and
			nop
			bnz	array_bound
			nop
			nop

			stmra				// read handle indirection
			wait				// for the GC
			wait
			ldmrd
			ldm	b
			ldi 1
			shl                 // index*2
			add					// index*2+arrayref
			stm d
			ldm d
			stmwa				// write ext. mem address
			ldm	c
			stmwd				// write ext. mem data
			ldm d
			ldi 1
			add					// index*2+arrayref+1
			wait
			wait
			stmwa				// write ext. mem address
			ldm	a
			stmwd				// write ext. mem data
			wait
			wait
			nop	nxt

laload:                           
			stm	b				// index
			// arrayref is TOS
			dup					// for null pointer check
			dup					// for bound check, one cycle wait for bz
			bz	null_pointer			// we do the following in the
			// branch slot -> one more element
			// from the former dup on the stack
			ldi	1
			add					// arrayref+1

			stmra				// read array length
			wait				// is this ok? - wait in branch slot
			wait
			ldmrd		 		// read ext. mem (array length)er	// 

			ldi	1
			sub					// length-1
			ldm	b				// index
			sub					// TOS = length-1-index
			ldm	b				// check if index is negative
			or					// is one of both checks negative?
         	ldi	-2147483648		//  0x80000000
			and
			nop
			bnz	array_bound
			nop
			nop

			stmra				// read handle indirection
			wait				// for the GC
			wait
			ldmrd
			ldm	b	
			ldi 1
			shl                 // index*2
			add					// index*2+arrayref
			dup
			stm d
			stmra				// read ext. mem, mem_bsy comes one cycle later
			wait
			wait
			ldmrd		 
			ldm d
			ldi 1
			add					// index*2+arrayref+1
			stmra				// read ext. mem, mem_bsy comes one cycle later
			wait
			wait
			ldmrd 	nxt	// read ext. mem

@


1.8
log
@typo (null_point*er*) in laload corrected
@
text
@d2 19
@


1.7
log
@laload, lastore enabled again (plus length from handle)
@
text
@d338 1
a338 1
			bz	null_point			// we do the following in the
@


1.6
log
@Moved mtab pointer and array length from the object/array to the handle
@
text
@d168 1
a168 1
long_write:
d211 1
a211 1
			// address!=0 for the bnz
a212 3
			bnz	long_read
			nop
			nop
d214 13
d259 1
a259 1
			// address!=0 for the bnz
d261 44
a304 1
			bnz	long_write
d308 75
a383 117
// see also the little optimizations in iaload/iastore
//
//	long array access disabled:
//		1. we run out of microcode memory
//		2. we need to add long array support in the GC:
//			copy the right size (add type info)
//
//lastore:
//			stm	a				// value_h
//			stm c               // value_l
//			stm	b				// index
//			// arrayref is TOS
//			dup					// for null pointer check
//			nop					// wait one cycle for flags of ref
//			bz	null_pointer	// 
//			nop
//			nop
//
//			dup					// bound check
//			ldi	1
//			add					// arrayref+1
//			stmra				// read ext. mem, mem_bsy comes one cycle later
//			wait				// is this ok? - wait in branch slot
//			wait
//			ldmrd		 		// read ext. mem (array length)
//
//			ldi	1
//			sub					// length-1
//			ldm	b				// index
//			sub					// TOS = length-1-index
//			ldm	b				// check if index is negativ
//			or					// is one of both checks neagtv?
//         	ldi	-2147483648		//  0x80000000
//			and
//			nop
//			bnz	array_bound
//			nop
//			nop
//
//			stmra				// read handle indirection
//			wait				// for the GC
//			wait
//			ldmrd
//			ldm	b
//			ldi 1
//			shl                 // index*2
//			add					// index*2+arrayref
//			stm d
//			ldm d
//			stmwa				// write ext. mem address
//			ldm	c
//			stmwd				// write ext. mem data
//			ldm d
//			ldi 1
//			add					// index*2+arrayref+1
//			wait
//			wait
//			stmwa				// write ext. mem address
//			ldm	a
//			stmwd				// write ext. mem data
//			wait
//			wait
//			nop	nxt
//
//laload:                           
//			stm	b				// index
//			// arrayref is TOS
//			dup					// for null pointer check
//			nop					// wait one cycle for flags of ref
//			bz	null_pointer	// 
//			nop
//			nop
//
//			dup					// for bound check
//			ldi	1
//			add					// arrayref+1
//
//			stmra				// read array length
//			wait				// is this ok? - wait in branch slot
//			wait
//			ldmrd		 		// read ext. mem (array length)
//
//			ldi	1
//			sub					// length-1
//			ldm	b				// index
//			sub					// TOS = length-1-index
//			ldm	b				// check if index is negative
//			or					// is one of both checks negative?
//         	ldi	-2147483648		//  0x80000000
//			and
//			nop
//			bnz	array_bound
//			nop
//			nop
//
//			stmra				// read handle indirection
//			wait				// for the GC
//			wait
//			ldmrd
//			ldm	b	
//			ldi 1
//			shl                 // index*2
//			add					// index*2+arrayref
//			dup
//			stm d
//			stmra				// read ext. mem, mem_bsy comes one cycle later
//			wait
//			wait
//			ldmrd		 
//			ldm d
//			ldi 1
//			add					// index*2+arrayref+1
//			stmra				// read ext. mem, mem_bsy comes one cycle later
//			wait
//			wait
//			ldmrd 	nxt	// read ext. mem
//
@


1.5
log
@Use offset instead of CP index in get/putfield bytecodes
@
text
@a201 1
#ifdef HANDLE
d206 1
a206 1
#endif
a239 1
#ifdef HANDLE
d244 1
a244 1
#endif
d256 1
a273 7
//#ifdef HANDLE
//			stmra				// read handle indirection
//			wait				// for the GC
//			wait
//			ldmrd
//#endif
//
d275 2
a276 2
//			ldi	-1
//			add					// arrayref-1
d292 8
a299 1
//			ldm	b				// in branch slot....
a327 6
//#ifdef HANDLE
//			stmra				// read handle indirection
//			wait				// for the GC
//			wait
//			ldmrd
//#endif
d330 2
a331 2
//			ldi	-1
//			add					// arrayref-1
d348 8
a355 1
//			ldm	b				// in branch slot...
@


1.4
log
@long bytecodes (Peter Schrammel & Christof Pitter)
@
text
@d168 1
d187 1
a187 2
				// int idx = readOpd16u();
				// int off = readMem(cp+idx);
d190 2
a191 1
				// 	ref = readMem(ref);
a207 1
			ldm	cp opd
d209 2
a210 8
			ld_opd_16u
			add

			stmra				// read ext. mem, mem_bsy comes one cycle later
			wait
			wait
			ldmrd			 	// read offset

d221 1
a221 2
				// int idx = readOpd16u();
				// int off = readMem(cp+idx);
d226 1
a246 1
			ldm	cp opd
d248 2
a249 8
			ld_opd_16u
			add

			stmra				// read ext. mem, mem_bsy comes one cycle later
			wait
			wait
			ldmrd			 	// read offset

d251 1
d253 3
a256 14
			stmwa				// write ext. mem address
			ldm	a				// restore value
			stmwd				// write ext. mem data
			ldi	1
			add
			wait
			wait

			stmwa
			ldm	b
			stmwd
			wait
			wait
			nop	nxt
d261 1
a261 1
//		2. we need to add long array support in the GC
@


1.3
log
@new 'special' bytecodes for get/put field/static of long and references
@
text
@d281 115
@


1.2
log
@bytecode load in hardware (mem32.vhd).
@
text
@d4 4
d38 1
a38 1
			ldi 1 nxt			// is TOS low part? yes... see ldc2_w and JOPWriter
d114 167
@


1.1
log
@resync of actual development.
@
text
@d5 1
a5 20
lreturn:
dreturn:
			stm	a	// return value
			stm b
			stm	mp
			stm	cp
			stvp

			stm	new_jpc
			nop			// written in adr/read stage!
			stsp	// last is new sp
			pop		// flash tos, tos-1 (registers)
			pop		// sp must be two lower, points to rd adr
			ldm b
			ldm	a 
			ldi	1
			nop
			bnz	load_bc
			nop
			nop
@