head     1.1;
branch   1.1.1;
access   ;
symbols  vlsi:1.1.1.1 marta:1.1.1;
locks    ; strict;
comment  @# @;


1.1
date     2002.02.09.13.47.48;  author marta;  state Exp;
branches 1.1.1.1;
next     ;

1.1.1.1
date     2002.02.09.13.47.48;  author marta;  state Exp;
branches ;
next     ;


desc
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1.1
log
@Initial revision
@
text
@-- File Name    : leftshiftregister1.vbe
-- Description  : Shift register left
-- Author       : Mas Adit
-- Date         : 29 Agustus 2001

ENTITY leftshiftregister1 IS
PORT(
  p     : IN BIT_VECTOR (16 DOWNTO 0);
  q     : IN BIT;
  r     : OUT BIT_VECTOR (33 DOWNTO 0);
  vdd   : IN  BIT;
  vss   : IN  BIT
);
END leftshiftregister1;

ARCHITECTURE VBE OF leftshiftregister1 IS
  SIGNAL s : BIT_VECTOR (33 DOWNTO 0);

BEGIN
  ASSERT ((vdd and not (vss)) = '1')
  REPORT "power supply is missing on leftshiftregister1"
  SEVERITY WARNING;

  s <= ('0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0'
        & '0' & '0' & '0' & '0' & '0' & '0' & '0' & p & '0') WHEN (q = "1")
        ELSE "0000000000000000000000000000000000";
  r <= s;
END VBE;
@


1.1.1.1
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@no message
@
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