
WLA DX: Cx4 mnemonics listed in opcode order.

If you notice any errors or something is missing, please
open an issue @ https://github.com/vhelin/wla-dx


@ = shifted accumulator A (constant placeholder in opcode)
r = general purpose register
u = small immediate (rotate/shift count)
g = small immediate (page bank)
x = 8bit immediate / page operand / branch target
q = 10bit ROM address
PH operand of "MOV PH,x" is a 7bit immediate

$0000 "NOP"
$0800 "BRA x"
$0800 "JMP x"
$0A00 "BRA.F x"
$0A00 "JMP.F x"
$0C00 "BEQ x"
$0C00 "JMP EQ,x"
$0E00 "BEQ.F x"
$0E00 "JMP EQ.F,x"
$1000 "BGE x"
$1000 "JMP GE,x"
$1200 "BGE.F x"
$1200 "JMP GE.F,x"
$1400 "BMI x"
$1400 "JMP MI,x"
$1600 "BMI.F x"
$1600 "JMP MI.F,x"
$1800 "BVS x"
$1800 "JMP VS,x"
$1A00 "BVS.F x"
$1A00 "JMP VS.F,x"
$1C00 "WAIT"
$2400 "SKIPVC"
$2401 "SKIPVS"
$2500 "SKIPLT"
$2501 "SKIPGE"
$2600 "SKIPNE"
$2601 "SKIPEQ"
$2700 "SKIPPL"
$2701 "SKIPMI"
$2800 "BSR x"
$2800 "JSR x"
$2A00 "BSR.F x"
$2A00 "JSR.F x"
$2C00 "BSREQ x"
$2C00 "JSR EQ,x"
$2E00 "BSREQ.F x"
$2E00 "JSR EQ.F,x"
$3000 "BSRGE x"
$3000 "JSR GE,x"
$3200 "BSRGE.F x"
$3200 "JSR GE.F,x"
$3400 "BSRMI x"
$3400 "JSR MI,x"
$3600 "BSRMI.F x"
$3600 "JSR MI.F,x"
$3800 "BSRVS x"
$3800 "JSR VS,x"
$3A00 "BSRVS.F x"
$3A00 "JSR VS.F,x"
$3C00 "RTS"
$4000 "INC MAR"
$4800 "CMPR @,r"
$4C00 "CMPR @,x"
$5000 "CMP @,r"
$5400 "CMP @,x"
$5900 "EXTS A"
$5900 "SXB A"
$5A00 "EXTW A"
$5A00 "SXW A"
$6000 "LD A,r"
$6000 "MOV A,r"
$6100 "LD MDR,r"
$6100 "MOV MDR,r"
$6200 "LD MAR,r"
$6200 "MOV MAR,r"
$6300 "LD P,g"
$6300 "MOV P,g"
$6400 "LD A,x"
$6400 "MOV A,x"
$6500 "LD MDR,x"
$6500 "MOV MDR,x"
$6600 "LD MAR,x"
$6600 "MOV MAR,x"
$6700 "LD P,x"
$6700 "MOV P,x"
$6800 "RDRAM 0,A"
$6900 "RDRAM 1,A"
$6A00 "RDRAM 2,A"
$6C00 "RDRAM 0,x"
$6D00 "RDRAM 1,x"
$6E00 "RDRAM 2,x"
$7000 "RDROM A"
$7400 "RDROM q"
$7C00 "MOV PL,x"
$7D00 "MOV PH,x"
$8000 "ADD @,r"
$8400 "ADD @,x"
$8800 "SUBR @,r"
$8C00 "SUBR @,x"
$9000 "SUB @,r"
$9400 "SUB @,x"
$9800 "MUL r"
$9C00 "MUL x"
$A000 "XNOR @,r"
$A400 "XNOR @,x"
$A800 "XOR @,r"
$AC00 "XOR @,x"
$B000 "AND @,r"
$B400 "AND @,x"
$B800 "OR @,r"
$BC00 "OR @,x"
$C000 "SHLR r"
$C000 "SHR A,r"
$C400 "SHLR u"
$C400 "SHR A,u"
$C800 "ASR A,r"
$C800 "SHAR r"
$CC00 "ASR A,u"
$CC00 "SHAR u"
$D000 "ROR A,r"
$D000 "ROTR r"
$D400 "ROR A,u"
$D400 "ROTR u"
$D800 "SHL A,r"
$D800 "SHLL r"
$DC00 "SHL A,u"
$DC00 "SHLL u"
$E000 "MOV r,A"
$E000 "ST r,A"
$E100 "MOV r,MDR"
$E100 "ST r,MDR"
$E800 "WRRAM 0,A"
$E900 "WRRAM 1,A"
$EA00 "WRRAM 2,A"
$EC00 "WRRAM 0,x"
$ED00 "WRRAM 1,x"
$EE00 "WRRAM 2,x"
$F000 "SWAP A,g"
$F800 "CLEAR"
$FC00 "HALT"
