@c Copyright (C) 2000, 2009 Red Hat, Inc.
@c This file is part of the CGEN manual.
@c For copying conditions, see the file cgen.texi.

@node Simulation
@chapter Simulation support
@cindex Simulation support

Simulator support comes in the form of machine generated the decoder/executer
as well as the structure that records CPU state information (i.e., registers).

There are currently two simulators that use CGEN:

@menu
* GDB Simulator::
* SID Simulator::
@end menu

@node GDB Simulator
@section GDB Simulator

Several simulators in the GDB tree use CGEN.
These simulators use a combination of the CGEN-generated files,
common files in the sim/common directory of GDB releases,
and custom target-specific code.

There are 3 architecture-wide generated files:

@table @file
@item arch.h
Definitions and declarations common to the entire architecture.
@item arch.c
Tables and code common to the entire architecture, but which can't be
put in the common area.
@item cpuall.h
Pseudo base classes of various structures.
@end table

Each ``CPU family'' has its own set of the following files:

@table @file
@item cpu.h
Definitions and declarations specific to a particular CPU family.
@item cpu.c
Tables and code specific to a particular CPU family.
@item decode.h
Decoder definitions and declarations.
@item decode.c
Decoder tables and code.
@item model.c
Tables and code for each model in the CPU family.
@item semantics.c
Code to perform each instruction.
@item sem-switch.c
Same as @file{semantics.c} but as one giant @code{switch} statement.
@end table

Either or both of @file{semantics.c} and @file{sem-switch.c} may
be provided, it's up to the port to choose.
@file{semantics.c} is either to work with, one function per instruction,
but @file{sem-switch.c} uses a ``computed goto'' switch and is thus
provides faster simulation.

@emph{NOTE:} The actual file names are up to the port.
The names of the files listed here are the convention.
One reason to use different names is if the port is simulating
different architecture variants and generates different files
for each variant.

A ``CPU family'' is an artificial creation to sort architecture variants
along whatever lines seem useful.  Additional hand-written files must be
provided.  @xref{Porting}, for details.

@node SID Simulator
@section SID Simulator

The SID simulator has its home page here:
http://sourceware.org/sid/.
Please refer to it for documentation on SID.

The CGEN-based simulators in SID live in directory
sid/component/cgen-cpu of the SID source tree.

CGEN provides the instruction decoder and semantic routines.
