//=============================================================================
//
//      mod_regs_wdt_2.h
//
//      WDT (Watch Dog Timer) Module (type 2) register definitions
//
//=============================================================================
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//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):   jskov
// Contributors:jskov
// Date:        2002-04-18
//              
//####DESCRIPTIONEND####
//
//=============================================================================

//--------------------------------------------------------------------------
#define CYGARC_REG_WTCSR_W              0xffff8610 // 16 bit
#define CYGARC_REG_WTCSR_R              0xffff8610 // 8 bit
#define CYGARC_REG_WTCNT_W              0xffff8610 // 16 bit
#define CYGARC_REG_WTCNT_R              0xffff8611 // 8 bit
#define CYGARC_REG_RSTCSR_W             0xffff8612 // 16 bit
#define CYGARC_REG_RSTCSR_R             0xffff8613 // 8 bit

#define CYGARC_REG_WTCSR_W_MAGIC        0xa518
#define CYGARC_REG_WTCNT_W_MAGIC        0x5a00
#define CYGARC_REG_RSTCSR_W_WOVF_MAGIC  0xa51f
#define CYGARC_REG_RSTCSR_W_RSTx_MAGIC  0x5a1f

#define CYGARC_REG_WTCSR_OVF            0x0080
#define CYGARC_REG_WTCSR_WTIT           0x0040
#define CYGARC_REG_WTCSR_TME            0x0020
#define CYGARC_REG_WTCSR_CLK_8192       0x0007

#define CYGARC_REG_WTCSR_INIT           (CYGARC_REG_WTCSR_W_MAGIC|0x00)

#define CYGARC_REG_RSTCSR_WOVF          0x0080
#define CYGARC_REG_RSTCSR_RSTE          0x0040
#define CYGARC_REG_RSTCSR_RSTS          0x0020
