eCos Reference Manual
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# The HAL Port

## Name

HAL Port -- Implementation Details

## Overview

This documentation explains how the eCos HAL specification has been mapped onto the M5272C3 hardware, and shold be read in conjunction with that specification. The M5272C3 platform HAL package complements the M68K architectural HAL, the MCFxxxx variant HAL, and the MCF5272 processor HAL. It provides functionality which is specific to the target board.

## Startup

Following a hard or soft reset the HAL will initialize or reinitialize most of the on-chip peripherals. There is an exception for RAM startup applications which depend on a ROM monitor for certain services: the UARTs and the ethernet device will not be reinitialized because they may be in use by RedBoot for communication with the host.

For a ROM or ROMFFE startup the HAL will perform additional initialization, setting up the external DRAM and programming the various internal registers. The values used for most of these registers are configurable. Full details can be found in the exported headers `cyg/hal/plf.inc` and `cyg/hal/proc.inc`.

## Linker Scripts and Memory Maps

The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:

external SDRAM

  This is mapped to location 0x00000000. The first 384 bytes are used for hardware exception vectors. The next 256 bytes are normally used for the eCos virtual vectors, allowing RAM-based applications to use services provided by the ROM monitor. For ROM and ROMFFE startup all remaining SDRAM is available. For RAM and DBUG startup available SDRAM starts at location 0x00020000, with the bottom 128K reserved for use by either the RedBoot or dBUG ROM monitors.

on-chip peripherals

  These are accessible at location 0x10000000 onwards, as per the defined symbol `HAL_MCFxxxx_MBAR`. This address cannot easily be changed during development because both the ROM monitor and the application must use the same address. The `%mbar` system register is initialized appropriately during a ROM or ROMFFE startup.

on-chip SRAM

  The 4K of internal SRAM are normally mapped at location 0x20000000. The `%rambar` register is initialized during a ROM startup using the value of the configuration option `CYGNUM_HAL_M68K_M5272C3_RAMBAR`. Neither eCos nor RedBoot use the internal SRAM so all of it is available to application code.

on-chip ROM

  Usually this is left disabled since its contents are of no interest to most applications. If it is enabled then it is usually mapped at location 0x21000000. The `%rombar` register is initialized during a ROM startup using the value of the configuration option `CYGNUM_HAL_M68K_M5272C3_ROMBAR`.

off-chip Flash

  This is located at the top of memory, location 0xFFE00000 onwards. For ROM and RAM startups it is assumed that a jumper is used to disable the bottom half of the flash, so location 0xFFE00000 is actually a mirror of 0xFFF00000. For ROMFFE and DBUG startups all of the flash is visible. By default the flash block at location 0xFFF00000 is used to hold RedBoot or another ROM startup application, and the block at location 0xFFFC00000 is used to hold flash management data and the RedBoot fconfig variables. The blocks at 0xFFF400000 and 0xFFF80000 can be used by application code.

## Clock Support

The platform HAL provides configuration options for the eCos system clock. This always uses the hardware timer 3, which should not be used directly by application code. The gprof-based profiling code uses timer 2, so that is only available when not profiling. Timers 0 and 1 are never used by eCos so application code is free to manipulate these as required. The actual HAL macros for managing the clock are provided by the MCF5272 processor HAL. The specific numbers used are a characteristic of the platform because they depend on the processor speed.

## Other Issues

The M5272C3 platform HAL does not affect the implementation of other parts of the eCos HAL specification. The MCF5272 processor HAL, the MCFxxxx variant HAL, and the M68K architectural HAL documentation should be consulted for further details.

## Other Functionality

The platform HAL package also provides a flash driver for the off-chip AMD AM29PL160C flash chip. This driver is inactive by default, and only becomes active if the configuration includes the generic flash support `CYGPKG_IO_FLASH`.

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