
static int dump_regs;
module_param(dump_regs, bool, 0);
MODULE_PARM_DESC(dump_regs, "Dump card registers to console.");

/**
 * Structure to keep a saved state.
 */
struct cyber5k_state {
	unsigned char r_3cf_33;
	unsigned char r_3cf_56;
	unsigned char r_3cf_bf;
	unsigned char r_3cf_fa;
	unsigned char r_3c2;
	unsigned char r_3c3;
	unsigned char r_3c5[101];
	unsigned char r_3c6;
	unsigned char r_colors[768];
	unsigned char r_3cf[196];
	unsigned char r_3d5[52];
	unsigned char r_second_3cf_3x[4];
	unsigned char r_ramdac;
	unsigned char r_cursor_index;
	unsigned char r_cursor[6];
	unsigned char r_bf01[15];
	unsigned char r_bf02[15];
	unsigned char r_bf03[15];
	unsigned char r_fa01[16];
	unsigned char r_fa05[2];
	unsigned char r_fa08[16];
	unsigned char r_fa10[16];
	unsigned char r_fa18[16];
	unsigned char r_fa20[8];
	unsigned char r_fa80[46];
	unsigned short r_tvreg1[66];
	unsigned short r_tvreg2[34];
	unsigned short r_tvreg3[84];
};

/**
 * Saved state on module load.
 */
struct cyber5k_state cyber5k_state;

/**
 * State save & restore functions.
 */
static unsigned char regs_3c5[101] = {
	0x00, 0x01, 0x02, 0x03, 0x04, 0x30, 0x31, 0x32,
	0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a,
	0x3b, 0x3c, 0x3d, 0x3e, 0x3f, 0x40, 0x41, 0x42,
	0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4a,
	0x4b, 0x4c, 0x4d, 0x4e, 0x4f, 0xa0, 0xa1, 0xa2,
	0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa,
	0xab, 0xac, 0xad, 0xae, 0xaf, 0xc0, 0xc1, 0xc2,
	0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca,
	0xcb, 0xcc, 0xcd, 0xce, 0xcf, 0xd0, 0xd1, 0xd2,
	0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 0xd8, 0xd9, 0xda,
	0xdb, 0xdc, 0xdd, 0xde, 0xdf, 0xe0, 0xe1, 0xe2,
	0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea,
	0xeb, 0xec, 0xed, 0xee, 0xef
};

static unsigned char regs_3cf[196] = {
	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
	0x08, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16,
	0x30, 0x31, 0x32, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
	0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
	0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4e, 0x4f, 0x50,
	0x51, 0x52, 0x53, 0x54, 0x55, 0x57, 0x58, 0x59,
	0x5a, 0x5c, 0x5d, 0x5e, 0x5f, 0x60, 0x61, 0x62,
	0x63, 0x64, 0x65, 0x66, 0x67, 0x69, 0x6a, 0x6b,
	0x6c, 0x6d, 0x6e, 0x6f, 0x70, 0x71, 0x72, 0x73,
	0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b,
	0x7e, 0x7f, 0x80, 0x81, 0x82, 0x83, 0x84, 0x85,
	0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d,
	0x8e, 0x8f, 0x90, 0x94, 0x95, 0x96, 0x97, 0x98,
	0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0xa0, 0xa1,
	0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9,
	0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1,
	0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 0xb8, 0xb9,
	0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xc0, 0xc1, 0xc2,
	0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca,
	0xcb, 0xcc, 0xcd, 0xce, 0xcf, 0xd0, 0xd1, 0xd2,
	0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 0xd8, 0xd9, 0xda,
	0xdb, 0xdc, 0xdd, 0xde, 0xdf, 0xe8, 0xe9, 0xea,
	0xeb, 0xec, 0xed, 0xee, 0xef, 0xf0, 0xf1, 0xf2,
	0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9, 0xfb,
	0xfc, 0xfd, 0xfe, 0xff
};

static unsigned char regs_3d5[52] = {
	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
	0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
	0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
	0x18, 0x1f, 0x28, 0x2a, 0x2b, 0x30, 0x31, 0x32,
	0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a,
	0x3b, 0x3c, 0x3e, 0x3f, 0x40, 0x41, 0x42, 0x43,
	0x44, 0x45, 0x46, 0x47
};

static unsigned char regs_fa80[46] = {
	0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
	0x68, 0x69, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x80,
	0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88,
	0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f, 0xe0,
	0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8,
	0xe9, 0xea, 0xec, 0xed, 0xee, 0xef
};

static void
cyber5k_save_state(struct cyber5k_info *c5k)
{
	struct cyber5k_state *state = &cyber5k_state;
	int i;

	state->r_3cf_33 = cyber5k_inx(c5k, 0x3ce, 0x33);
	state->r_3cf_56 = cyber5k_inx(c5k, 0x3ce, 0x56);
	state->r_3cf_bf = cyber5k_inx(c5k, 0x3ce, 0xbf);
	state->r_3cf_fa = cyber5k_inx(c5k, 0x3ce, 0xfa);

	/* Reset switch registers. */
	cyber5k_outx(c5k, 0x3ce, 0x33, state->r_3cf_33 & 0xbf);
	cyber5k_outx(c5k, 0x3ce, 0x56, state->r_3cf_56 & 0xfb);
	cyber5k_outx(c5k, 0x3ce, 0xbf, state->r_3cf_bf & 0xfc);
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x00));

	/* 3c2/3cc */
	state->r_3c2 = cyber5k_inb(c5k, 0x3cc);
	/* 3c3 */
	state->r_3c3 = cyber5k_inb(c5k, 0x3c3);
	/* 3c5/xx */
	for (i = 0; i < 101; i++)
		state->r_3c5[i] = cyber5k_inx(c5k, 0x3c4, regs_3c5[i]);
	/* 3c6 */
	state->r_3c6 = cyber5k_inb(c5k, 0x3c6);
	/* 3c7(3c8) 3c9 x 256 x 3*/
	for (i = 0; i < 768; i++) {
		cyber5k_outb(c5k, 0x3c7, i);
		state->r_colors[i] = cyber5k_inb(c5k, 0x3c9);
	}
	/* 3cf/xx */
	for (i = 0; i < 196; i++)
		state->r_3cf[i] = cyber5k_inx(c5k, 0x3ce, regs_3cf[i]);
	/* 3d5/xx */
	for (i = 0; i < 52; i++)
		state->r_3d5[i] = cyber5k_inx(c5k, 0x3d4, regs_3d5[i]);

	/* Second bank registers 3cf/3c - 3cf/3f */
	cyber5k_outx(c5k, 0x3ce, 0x33, state->r_3cf_33 | 0x40);
	state->r_second_3cf_3x[0] = cyber5k_inx(c5k, 0x3ce, 0x3c);
	state->r_second_3cf_3x[1] = cyber5k_inx(c5k, 0x3ce, 0x3d);
	state->r_second_3cf_3x[2] = cyber5k_inx(c5k, 0x3ce, 0x3e);
	state->r_second_3cf_3x[3] = cyber5k_inx(c5k, 0x3ce, 0x3f);

	/* Cursor registers */
	cyber5k_outx(c5k, 0x3ce, 0x56, state->r_3cf_56 | 0x04);
	state->r_ramdac = cyber5k_inb(c5k, 0x3c6);
	state->r_cursor_index = cyber5k_inb(c5k, 0x3c7);
	cyber5k_outb(c5k, 0x3c8, 0x00);
	state->r_cursor[0] = cyber5k_inb(c5k, 0x3c9);
	state->r_cursor[1] = cyber5k_inb(c5k, 0x3c9);
	state->r_cursor[2] = cyber5k_inb(c5k, 0x3c9);
	cyber5k_outb(c5k, 0x3c8, 0x01);
	state->r_cursor[3] = cyber5k_inb(c5k, 0x3c9);
	state->r_cursor[4] = cyber5k_inb(c5k, 0x3c9);
	state->r_cursor[5] = cyber5k_inb(c5k, 0x3c9);
	cyber5k_outb(c5k, 0x3c8, state->r_cursor_index);

	/* bf01 registers. */
	cyber5k_outx(c5k, 0x3ce, 0xbf, (state->r_3cf_bf & 0xfc) | 0x01);
	for (i = 0; i < 15; i++)
		state->r_bf01[i] = cyber5k_inx(c5k, 0x3ce, 0xb0 + i);

	/* bf02 registers. */
	cyber5k_outx(c5k, 0x3ce, 0xbf, (state->r_3cf_bf & 0xfc) | 0x02);
	for (i = 0; i < 15; i++)
		state->r_bf02[i] = cyber5k_inx(c5k, 0x3ce, 0xb0 + i);

	/* bf03 registers. */
	cyber5k_outx(c5k, 0x3ce, 0xbf, (state->r_3cf_bf & 0xfc) | 0x03);
	for (i = 0; i < 15; i++)
		state->r_bf03[i] = cyber5k_inx(c5k, 0x3ce, 0xb0 + i);

	/* fa01 registers. */
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x01));
	for (i = 0; i < 16; i++)
		state->r_fa01[i] = cyber5k_inx(c5k, 0x3ce, 0x40 + i);

	/* fa05 registers. */
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x05));
	state->r_fa05[0] = cyber5k_inx(c5k, 0x3ce, 0x49);
	state->r_fa05[1] = cyber5k_inx(c5k, 0x3ce, 0x4e);

	/* fa08 registers. */
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x08));
	for (i = 0; i < 16; i++)
		state->r_fa08[i] = cyber5k_inx(c5k, 0x3c4, 0x40 + i);

	/* fa10 registers. */
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x10));
	for (i = 0; i < 16; i++)
		state->r_fa10[i] = cyber5k_inx(c5k, 0x3c4, 0x40 + i);

	/* fa18 registers. */
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x18));
	for (i = 0; i < 16; i++)
		state->r_fa18[i] = cyber5k_inx(c5k, 0x3c4, 0x40 + i);

	/* fa20 registers. */
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x20));
	for (i = 0; i < 8; i++)
		state->r_fa20[i] = cyber5k_inx(c5k, 0x3c4, 0x40 + i);

	/* fa80 registers. */
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x80));
	for (i = 0; i < 46; i++)
		state->r_fa80[i] = cyber5k_inx(c5k, 0x3c4, regs_fa80[i]);

	/* Read tv registers. */
	for (i = 0; i < 66; i++)
		state->r_tvreg1[i] = cyber5k_inw(c5k, 0xbe428 + 4*i);
	for (i = 0; i < 34; i++)
		state->r_tvreg2[i] = cyber5k_inw(c5k, 0xbe530 + 2*i);
	for (i = 0; i < 84; i++)
		state->r_tvreg3[i] = cyber5k_inw(c5k, 0xbe574 + 2*i);

	/* Write old values to switch registers. */
	cyber5k_outx(c5k, 0x3ce, 0x33, state->r_3cf_33);
	cyber5k_outx(c5k, 0x3ce, 0x56, state->r_3cf_56);
	cyber5k_outx(c5k, 0x3ce, 0xbf, state->r_3cf_bf);
	cyber5k_outx(c5k, 0x3ce, 0xfa, state->r_3cf_fa);
}

static void
cyber5k_print_state(struct cyber5k_info *c5k)
{
	struct cyber5k_state *state = &cyber5k_state;
	int i;

	printk(KERN_INFO "content of graphic register\n");
	printk(KERN_INFO "0x3cf/0x33 = 0x%02x, 0x3cf/0x56 = 0x%02x, "
	                "0x3cf/0xbf = 0x%02x, 0x3cf/0xfa = 0x%02x\n",
	       state->r_3cf_33, state->r_3cf_56, state->r_3cf_bf, state->r_3cf_fa);

	printk(KERN_INFO "0x3c2/0x3cc = 0x%02x, 0x3c3 = 0x%02x\n",
	       state->r_3c2, state->r_3c3);
	for (i = 0; i < 101; i += 2)
		printk(KERN_INFO "0x3c5/0x%02x = 0x%02x, "
		       "0x3c5/0x%02x = 0x%02x\n",
		       regs_3c5[i], state->r_3c5[i],
		       regs_3c5[i+1], state->r_3c5[i+1]);
	printk(KERN_INFO "0x3c5/0x%02x = 0x%02x\n",
	       regs_3c5[100], state->r_3c5[100]);
	printk(KERN_INFO "0x3c6 = 0x%02x\n", state->r_3c6);
#if 0
	for (i = 0; i < NR_PALETTE; i += 3)
		printk(KERN_INFO "0x3c9[%i]) = 0x%02x 0x%02x 0x%02x, "
		                "0x3c9[%i]) = 0x%02x 0x%02x 0x%02x, "
		                "0x3c9[%i]) = 0x%02x 0x%02x 0x%02x\n",
		       i, state->r_colors[3*i], state->r_colors[3*i+1],
		       state->r_colors[3*i+2],
		       i+1, state->r_colors[3*i+3], state->r_colors[3*i+4],
		       state->r_colors[3*i+5],
		       i+2, state->r_colors[3*i+6], state->r_colors[3*i+7],
		       state->r_colors[3*i+8]);
	printk(KERN_INFO "0x3c9[255]) = 0x%02x 0x%02x 0x%02x,\n",
	       state->r_colors[765], state->r_colors[766],
	       state->r_colors[767]);
#endif
	for (i = 0; i < 196; i += 2)
		printk(KERN_INFO "0x3cf/0x%02x = 0x%02x, "
		                "0x3cf/0x%02x = 0x%02x\n",
		       regs_3cf[i], state->r_3cf[i],
		       regs_3cf[i+1], state->r_3cf[i+1]);
		       /* 3d5/xx */
	for (i = 0; i < 55; i += 2)
		printk(KERN_INFO "0x3d5/0x%02x = 0x%02x, "
		                "0x3d5/0x%02x = 0x%02x\n",
		       regs_3d5[i], state->r_3d5[i],
		       regs_3d5[i+1], state->r_3d5[i+1]);
	printk(KERN_INFO "0x3d5/0x%02x = 0x%02x\n",
	       regs_3d5[54], state->r_3d5[54]);
	printk(KERN_INFO "0x3cf/0x33[6].0x3cf/0x3c = 0x%02x\n",
	       state->r_second_3cf_3x[0]);
	printk(KERN_INFO "0x3cf/0x33[6].0x3cf/0x3d = 0x%02x\n",
	       state->r_second_3cf_3x[1]);
	printk(KERN_INFO "0x3cf/0x33[6].0x3cf/0x3e = 0x%02x\n",
	       state->r_second_3cf_3x[2]);
	printk(KERN_INFO "0x3cf/0x33[6].0x3cf/0x3f = 0x%02x\n",
	       state->r_second_3cf_3x[3]);
	printk(KERN_INFO "0x3cf/0x56[2].0x3c6 = 0x%02x\n", state->r_ramdac);
	printk(KERN_INFO "0x3cf/0x56[2].0x3c7 = 0x%02x\n",
	       state->r_cursor_index);
	printk(KERN_INFO "0x3cf/0x56[2].0x3c9[0] = 0x%02x 0x%02x 0x%02x\n",
	       state->r_cursor[0], state->r_cursor[1], state->r_cursor[2]);
	printk(KERN_INFO "0x3cf/0x56[2].0x3c9[1] = 0x%02x 0x%02x 0x%02x\n",
	       state->r_cursor[3], state->r_cursor[4], state->r_cursor[5]);
	for (i = 0; i < 15; i++)
		printk(KERN_INFO "0x3cf/0xbf01.0x3cf/0x%02x = 0x%02x\n",
		       0xb0 + i, state->r_bf01[i]);
	for (i = 0; i < 15; i++)
		printk(KERN_INFO "0x3cf/0xbf02.0x3cf/0x%02x = 0x%02x\n",
		       0xb0 + i, state->r_bf02[i]);
	for (i = 0; i < 15; i++)
		printk(KERN_INFO "0x3cf/0xbf03.0x3cf/0x%02x = 0x%02x\n",
		       0xb0 + i, state->r_bf03[i]);
	for (i = 0; i < 16; i++)
		printk(KERN_INFO "0x3cf/0xfa01.0x3cf/0x%02x = 0x%02x\n",
		       0x40 + i, state->r_fa01[i]);
	printk(KERN_INFO "0x3cf/0xfa05.0x3cf/0x49 = 0x%02x\n",
	       state->r_fa05[0]);
	printk(KERN_INFO "0x3cf/0xfa05.0x3cf/0x4e = 0x%02x\n",
	       state->r_fa05[1]);
	for (i = 0; i < 16; i++)
		printk(KERN_INFO "0x3cf/0xfa08.0x3cf/0x%02x = 0x%02x\n",
		       0x40 + i, state->r_fa08[i]);
	for (i = 0; i < 16; i++)
		printk(KERN_INFO "0x3cf/0xfa10.0x3cf/0x%02x = 0x%02x\n",
		       0x40 + i, state->r_fa10[i]);
	for (i = 0; i < 16; i++)
		printk(KERN_INFO "0x3cf/0xfa18.0x3cf/0x%02x = 0x%02x\n",
		       0x40 + i, state->r_fa18[i]);
	for (i = 0; i < 8; i++)
		printk(KERN_INFO "0x3cf/0xfa20.0x3cf/0x%02x = 0x%02x\n",
		       0x40 + i, state->r_fa20[i]);
	for (i = 0; i < 46; i++)
		printk(KERN_INFO "0x3cf/0xfa80.0x3cf/0x%02x = 0x%02x\n",
		       regs_fa80[i], state->r_fa80[i]);
	for (i = 0; i < 66; i += 2)
		printk(KERN_INFO "0x%05x = 0x%04x, 0x%05x = 0x%04x\n",
		       0xbe428 + 4*i, state->r_tvreg1[i],
		       0xbe428 + 4*i + 4, state->r_tvreg1[i+1]);
	for (i = 0; i < 34; i += 2)
		printk(KERN_INFO "0x%05x = 0x%04x, 0x%05x = 0x%04x\n",
		       0xbe530 + 2*i, state->r_tvreg2[i],
		       0xbe530 + 2*i + 2, state->r_tvreg2[i+1]);
	for (i = 0; i < 84; i += 2)
		printk(KERN_INFO "0x%05x = 0x%08x, 0x%05x = 0x%08x\n",
		       0xbe574 + 2*i, state->r_tvreg3[i],
		       0xbe574 + 2*i + 2, state->r_tvreg3[i+1]);
}

static void
cyber5k_restore_state(struct cyber5k_info *c5k)
{
	// FIXME: palette 0x3c0
	struct cyber5k_state *state = &cyber5k_state;
	int i;

	cyber5k_ramdac_off(c5k);

	/* Reset switch registers. */
	cyber5k_outx(c5k, 0x3ce, 0x33, state->r_3cf_33 & 0xbf);
	cyber5k_outx(c5k, 0x3ce, 0x56, state->r_3cf_56 & 0xfb);
	cyber5k_outx(c5k, 0x3ce, 0xbf, state->r_3cf_bf & 0xfc);
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x00));

	/* 3c2/3cc */
	cyber5k_outb(c5k, 0x3c2, state->r_3c2);
	/* 3c3 */
	cyber5k_outb(c5k, 0x3c3, state->r_3c3);
	/* 3c5/xx */
	for (i = 0; i < 101; i++)
		cyber5k_outx(c5k, 0x3c4, regs_3c5[i], state->r_3c5[i]);
	cyber5k_outw(c5k, 0x3c4, MKW(0x00, 0x03));
	/* 3c6 */
	cyber5k_outb(c5k, 0x3c6, state->r_3c6);
	/* 3c7(3c8) 3c9 x 256 x 3*/
	for (i = 0; i < 768; i++) {
		cyber5k_outb(c5k, 0x3c8, i);
		cyber5k_outb(c5k, 0x3c9, state->r_colors[i]);
	}
	cyber5k_inb(c5k, 0x3da);
	/* 3cf/xx */
	for (i = 0; i < 196; i++)
		cyber5k_outx(c5k, 0x3ce, regs_3cf[i], state->r_3cf[i]);

	/* 3d5/xx */
	cyber5k_andx(c5k, 0x3d4, 0x11, 0x7f);
	for (i = 0; i < 55; i++)
		cyber5k_outx(c5k, 0x3d4, regs_3d5[i], state->r_3d5[i]);

	/* Second bank registers 3cf/3c - 3cf/3f */
	cyber5k_outx(c5k, 0x3ce, 0x33, state->r_3cf_33 | 0x40);
	cyber5k_outx(c5k, 0x3ce, 0x3c, state->r_second_3cf_3x[0]);
	cyber5k_outx(c5k, 0x3ce, 0x3d, state->r_second_3cf_3x[1]);
	cyber5k_outx(c5k, 0x3ce, 0x3e, state->r_second_3cf_3x[2]);
	cyber5k_outx(c5k, 0x3ce, 0x3f, state->r_second_3cf_3x[3]);

	/* Cursor registers */
	cyber5k_outx(c5k, 0x3ce, 0x56, state->r_3cf_56 | 0x04);
	cyber5k_outb(c5k, 0x3c6, state->r_ramdac | 0x40); /* keep DAC off */
	cyber5k_outb(c5k, 0x3c8, 0x00);
	cyber5k_outb(c5k, 0x3c9, state->r_cursor[0]);
	cyber5k_outb(c5k, 0x3c9, state->r_cursor[1]);
	cyber5k_outb(c5k, 0x3c9, state->r_cursor[2]);
	cyber5k_outb(c5k, 0x3c8, 0x01);
	cyber5k_outb(c5k, 0x3c9, state->r_cursor[3]);
	cyber5k_outb(c5k, 0x3c9, state->r_cursor[4]);
	cyber5k_outb(c5k, 0x3c9, state->r_cursor[5]);
	cyber5k_outb(c5k, 0x3c8, state->r_cursor_index);

	/* bf01 registers. */
	cyber5k_outx(c5k, 0x3ce, 0xbf, (state->r_3cf_bf & 0xfc) | 0x01);
	for (i = 0; i < 15; i++)
		cyber5k_outx(c5k, 0x3ce, 0xb0 + i, state->r_bf01[i]);

	/* bf02 registers. */
	cyber5k_outx(c5k, 0x3ce, 0xbf, (state->r_3cf_bf & 0xfc) | 0x02);
	for (i = 0; i < 15; i++)
		cyber5k_outx(c5k, 0x3ce, 0xb0 + i, state->r_bf02[i]);

	/* bf03 registers. */
	cyber5k_outx(c5k, 0x3ce, 0xbf, (state->r_3cf_bf & 0xfc) | 0x03);
	for (i = 0; i < 15; i++)
		cyber5k_outx(c5k, 0x3ce, 0xb0 + i, state->r_bf03[i]);

	/* fa01 registers. */
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x01));
	for (i = 0; i < 16; i++)
		cyber5k_outx(c5k, 0x3ce, 0x40 + i, state->r_fa01[i]);

	/* fa05 registers. */
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x05));
	cyber5k_outx(c5k, 0x3ce, 0x49, state->r_fa05[0]);
	cyber5k_outx(c5k, 0x3ce, 0x4e, state->r_fa05[1]);

	/* fa08 registers. */
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x08));
	for (i = 0; i < 16; i++)
		cyber5k_outx(c5k, 0x3c4, 0x40 + i, state->r_fa08[i]);

	/* fa10 registers. */
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x10));
	for (i = 0; i < 16; i++)
		cyber5k_outx(c5k, 0x3c4, 0x40 + i, state->r_fa10[i]);

	/* fa18 registers. */
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x18));
	for (i = 0; i < 16; i++)
		cyber5k_outx(c5k, 0x3c4, 0x40 + i, state->r_fa18[i]);

	/* fa20 registers. */
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x20));
	for (i = 0; i < 8; i++)
		cyber5k_outx(c5k, 0x3c4, 0x40 + i, state->r_fa20[i]);

	/* fa80 registers. */
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x80));
	for (i = 0; i < 46; i++)
		cyber5k_outx(c5k, 0x3c4, regs_fa80[i], state->r_fa80[i]);

	/* Back to fa00. */
	cyber5k_outw(c5k, 0x3ce, MKW(0xfa, 0x00));

	/* Write tv registers. */
	for (i = 0; i < 66; i++)
		cyber5k_outw(c5k, 0xbe428 + 4*i, state->r_tvreg1[i]);
	for (i = 0; i < 34; i++)
		cyber5k_outw(c5k, 0xbe530 + 2*i, state->r_tvreg2[i]);
	for (i = 0; i < 64; i++)
		cyber5k_outw(c5k, 0xbe574 + 2*i, state->r_tvreg3[i]);

	/* Toggle ram and clock and then switch on ramdac. */
	cyber5k_toggle_ram(c5k);
	cyber5k_toggle_clock(c5k);
	cyber5k_ramdac_on(c5k);

	/* Write old values to switch registers. */
	cyber5k_outx(c5k, 0x3ce, 0x56, state->r_3cf_56);
	cyber5k_outx(c5k, 0x3ce, 0xbf, state->r_3cf_bf);
	cyber5k_outx(c5k, 0x3ce, 0xfa, state->r_3cf_fa);
	cyber5k_outx(c5k, 0x3ce, 0x33, state->r_3cf_33);
}

